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Searched refs:rec_ctrl (Results 1 – 3 of 3) sorted by relevance

/arch/cris/arch-v32/kernel/
Ddebugport.c126 reg_ser_rw_rec_ctrl rec_ctrl = {0}; in start_port() local
130 tr_ctrl.base_freq = rec_ctrl.base_freq = regk_ser_f29_493; in start_port()
131 tr_dma_en.en = rec_ctrl.dma_mode = regk_ser_no; in start_port()
133 tr_ctrl.en = rec_ctrl.en = 1; in start_port()
139 rec_ctrl.par_en = regk_ser_yes; in start_port()
140 rec_ctrl.par = regk_ser_odd; in start_port()
146 rec_ctrl.par_en = regk_ser_yes; in start_port()
147 rec_ctrl.par = regk_ser_odd; in start_port()
153 rec_ctrl.data_bits = regk_ser_bits7; in start_port()
160 REG_WR (ser, p->instance, rw_rec_ctrl, rec_ctrl); in start_port()
/arch/cris/arch-v10/kernel/
Ddebugport.c35 volatile char* rec_ctrl; member
136 unsigned long rec_ctrl = 0; in start_port() local
231 rec_ctrl = in start_port()
238 rec_ctrl = in start_port()
245 rec_ctrl = in start_port()
254 rec_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_bitnr, rec_7bit); in start_port()
259 rec_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_bitnr, rec_8bit); in start_port()
263 *p->rec_ctrl = in start_port()
269 rec_ctrl; in start_port()
383 *kgdb_port->rec_ctrl = IO_STATE(R_SERIAL0_REC_CTRL, rec_enable, enable); in enableDebugIRQ()
/arch/cris/arch-v32/boot/compressed/
Dmisc.c218 reg_ser_rw_rec_ctrl rec_ctrl; in serial_setup() local
232 rec_ctrl = REG_RD(ser, regi_ser, rw_rec_ctrl); in serial_setup()
238 rec_ctrl.en = 1; /* enabler receiver */ in serial_setup()
246 rec_ctrl.base_freq = regk_ser_f29_493; in serial_setup()
252 REG_WR(ser, regi_ser, rw_rec_ctrl, rec_ctrl); in serial_setup()