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Searched refs:rsc (Results 1 – 23 of 23) sorted by relevance

/arch/ia64/kernel/
Dpal.S67 mov loc4=ar.rsc // save RSE configuration
69 mov ar.rsc=0 // put RSE in enforced lazy, LE mode
83 mov ar.rsc = loc4 // restore RSE configuration
164 mov loc4=ar.rsc // save RSE configuration
169 mov ar.rsc=0 // put RSE in enforced lazy, LE mode
182 mov ar.rsc=0 // put RSE in enforced lazy, LE mode
192 mov ar.rsc=loc4 // restore RSE configuration
217 mov loc4=ar.rsc // save RSE configuration
220 mov ar.rsc=0 // put RSE in enforced lazy, LE mode
239 mov ar.rsc=0 // put RSE in enforced lazy, LE mode
[all …]
Djprobes.S73 mov r16=ar.rsc
75 mov ar.rsc=r0
79 mov ar.rsc=r16
Defi_stub.S53 mov loc4=ar.rsc // save RSE configuration
54 mov ar.rsc=0 // put RSE in enforced lazy, LE mode
76 .ret1: mov ar.rsc=0 // put RSE in enforced lazy, LE mode
81 .ret2: mov ar.rsc=loc4 // restore RSE configuration
Desi_stub.S70 mov loc4=ar.rsc // save RSE configuration
71 mov ar.rsc=0 // put RSE in enforced lazy, LE mode
86 .ret1: mov ar.rsc=0 // put RSE in enforced lazy, LE mode
91 .ret2: mov ar.rsc=loc4 // restore RSE configuration
Dgate.S108 mov r27=ar.rsc // M2 (12 cyc)
276 mov ar.rsc=0 // put RSE into enforced lazy mode
296 mov ar.rsc=0xf // set RSE into eager mode, pl 3
331 mov ar.rsc=r17 // put RSE into enforced lazy mode
373 mov ar.rsc=0xf // (will be restored later on from sc_ar_rsc)
Dminstate.h49 mov r27=ar.rsc; /* M */ \
69 (pUStk) mov ar.rsc=0; /* set enforced lazy mode, pl 0, little-endian, loadrs=0 */ \
83 (pUStk) mov ar.rsc=0x3; /* set eager mode, pl 0, little-endian, loadrs=0 */ \
237 mov ar.rsc=r0 \
Dmca_drv_asm.S21 mov ar.rsc=0
Drelocate_kernel.S41 mov ar.rsc=0 // put RSE in enforced lazy mode
193 mov ar.rsc=0 // put RSE in enforced lazy mode
260 mov r5=ar.rsc
Dmca_asm.S261 mov ar.rsc=3 // set eager mode for C handler
351 mov ar.rsc=3 // set eager mode for C handler
970 mov ar.rsc=temp2
1065 mov ar.rsc=0
1073 mov ar.rsc=3
Dsignal.c55 unsigned long ip, flags, nat, um, cfm, rsc; in restore_sigcontext() local
67 err |= __get_user(rsc, &sc->sc_ar_rsc); in restore_sigcontext()
80 scr->pt.ar_rsc = rsc | (3 << 2); /* force PL3 */ in restore_sigcontext()
Dfsys.S600 mov r27=ar.rsc
684 mov ar.rsc=0 // M2 set enforced lazy mode, pl 0, LE, loadrs=0
733 mov ar.rsc=0x3 // M2 set eager mode, pl 0, LE, loadrs=0
Dentry.S299 mov.m ar.rsc=0 // put RSE in mode: enforced lazy, little endian, pl 0
374 mov ar.rsc=3 // put RSE back into eager mode, pl 0
392 mov ar.rsc=0 // put RSE into enforced lazy mode
474 mov ar.rsc=3 // put RSE back into eager mode, pl 0
1093 mov ar.rsc=r19 // load ar.rsc to be used for "loadrs"
1182 mov ar.rsc=r27 // M2
Divt.S733 mov.m r27=ar.rsc // M2 (12 cyc)
736 mov.m ar.rsc=0 // M2
846 mov ar.rsc=0x3 // M2 set eager mode, pl 0, LE, loadrs=0
1569 mov ar.rsc=r27 // restore ar.rsc before SAVE_MIN_WITH_COVER
Dhead.S359 mov ar.rsc=0 // place RSE in enforced lazy mode
391 mov ar.rsc=0x3 // place RSE in eager mode
1232 mov ar.rsc=0 // Put RSE in enforced lazy, LE mode
Dptrace.c998 unsigned long psr, rsc, ec, lc, rnat, bsp, cfm, nat_bits, val = 0; in ptrace_setregs() local
1031 retval |= __get_user(rsc, &ppr->ar[PT_AUR_RSC]); in ptrace_setregs()
1129 retval |= access_uarea(child, PT_AR_RSC, &rsc, 1); in ptrace_setregs()
/arch/ia64/include/asm/xen/
Dminstate.h29 mov r27=ar.rsc; /* M */ \
48 (pUStk) mov ar.rsc=0; /* set enforced lazy mode, pl 0, little-endian, loadrs=0 */ \
62 (pUStk) mov ar.rsc=0x3; /* set eager mode, pl 0, little-endian, loadrs=0 */ \
/arch/ia64/include/asm/
Dmca_asm.h85 mov ar.rsc = 0 ; \
168 mov ar.rsc = 0; \
/arch/ia64/xen/
Dxen_pv_ops.c54 unsigned long rsc = ia64_getreg(_IA64_REG_AR_RSC); in xen_info_init() local
55 unsigned int rpl = (rsc & IA64_RSC_PL_MASK) >> IA64_RSC_PL_SHIFT; in xen_info_init()
/arch/ia64/kvm/
Dkvm_minstate.h32 mov ar.rsc = 0;/* set enforced lazy mode, pl 0, little-endian, loadrs=0 */\
44 mov ar.rsc = 0x3; /* set eager mode, pl 0, little-endian, loadrs=0 */
102 mov r27 = ar.rsc; /* M */ \
Dvmm_ivt.S276 mov r27=ar.rsc /* M */
1055 mov ar.rsc=r27
1205 mov ar.rsc=r20 // load ar.rsc to be used for "loadrs"
1246 mov ar.rsc=r26
1367 mov ar.rsc = 0
Dtrampoline.S960 mov r17 = ar.rsc
965 mov ar.rsc =0
1035 mov ar.rsc = r16
/arch/powerpc/kernel/
Dprom_init.c959 u32 rac, rsc; in prom_init_mem() local
968 rsc = 1; in prom_init_mem()
969 prom_getprop(_prom->root, "#size-cells", &rsc, sizeof(rsc)); in prom_init_mem()
971 prom_debug("root_size_cells: %x\n", (unsigned long) rsc); in prom_init_mem()
1004 while ((endp - p) >= (rac + rsc)) { in prom_init_mem()
1008 size = prom_next_cell(rsc, &p); in prom_init_mem()
/arch/m68k/fpsp040/
Dsint.S31 | 2. (X is in range) set rsc = 63 - exp(X). Unnormalize the