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Searched refs:rtcregs (Results 1 – 3 of 3) sorted by relevance

/arch/mips/sgi-ip22/
Dip22-reset.c56 tmp = hpc3c0->rtcregs[RTC_CMD] & 0xff; in sgi_machine_power_off()
57 hpc3c0->rtcregs[RTC_CMD] = tmp | RTC_WAM; in sgi_machine_power_off()
58 hpc3c0->rtcregs[RTC_WSEC] = 0; in sgi_machine_power_off()
59 hpc3c0->rtcregs[RTC_WHSEC] = 0; in sgi_machine_power_off()
67 tmp = hpc3c0->rtcregs[RTC_HOURS_ALARM]; in sgi_machine_power_off()
Dip22-platform.c201 res.start = HPC3_CHIP0_BASE + offsetof(struct hpc3_regs, rtcregs); in sgi_ds1286_devinit()
202 res.end = res.start + sizeof(hpc3c0->rtcregs) - 1; in sgi_ds1286_devinit()
/arch/mips/include/asm/sgi/
Dhpc3.h302 volatile u32 rtcregs[14]; /* Dallas clock registers */ member