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/arch/frv/kernel/
Dentry-table.S39 # (5) The fixup table for kernel-trap single-step
40 # (6) The fixup table for user-trap single-step
42 # Due to the way single-stepping works on this CPU (single-step is not
44 # we have to catch the single-step event in break.S and jump to the fixup
49 # single-step bypass management
77 # trap fixup table for single-stepping in user mode
83 # trap fixup table for single-stepping in user mode
Dbreak.S82 # catch the return from a TLB-miss handler that had single-step disabled
93 # - we need to take special action to suspend h/w single stepping if we've done
129 # special break insn requests single-stepping to be turned back on
286 # cancel single-stepping mode
305 # we single-stepped into an interrupt handler whilst interrupts were merely virtually disabled
336 # we also want to single step anyway, but after fixing up so that we get an event on the
360 # and then process the single step
389 # cancel single-stepping mode
428 # single stepping on return
/arch/x86/xen/
Dtime.c369 struct vcpu_set_singleshot_timer single; in xen_vcpuop_set_next_event() local
374 single.timeout_abs_ns = get_abs_timeout(delta); in xen_vcpuop_set_next_event()
375 single.flags = VCPU_SSHOTTMR_future; in xen_vcpuop_set_next_event()
377 ret = HYPERVISOR_vcpu_op(VCPUOP_set_singleshot_timer, cpu, &single); in xen_vcpuop_set_next_event()
/arch/ia64/
Dmodule.lds2 /* Group unwind sections into a single section: */
/arch/sh/boards/mach-r2d/
DKconfig11 with a single PCI slot.
/arch/arm/nwfpe/
Dsoftfloat-specialize71 The pattern for a default generated single-precision NaN.
78 Returns 1 if the single-precision floating-point value `a' is a NaN;
91 Returns 1 if the single-precision floating-point value `a' is a signaling
104 Returns the result of converting the single-precision floating-point NaN
123 Returns the result of converting the canonical NaN `a' to the single-
136 Takes two single-precision floating-point values `a' and `b', one of which
/arch/x86/math-emu/
Dreg_ld_str.c155 int FPU_load_single(float __user *single, FPU_REG *loaded_data) in FPU_load_single() argument
161 FPU_access_ok(VERIFY_READ, single, 4); in FPU_load_single()
162 FPU_get_user(m32, (unsigned long __user *)single); in FPU_load_single()
563 int FPU_store_single(FPU_REG *st0_ptr, u_char st0_tag, float __user *single) in FPU_store_single() argument
726 FPU_access_ok(VERIFY_WRITE, single, 4); in FPU_store_single()
728 (unsigned long __user *)single); in FPU_store_single()
744 FPU_access_ok(VERIFY_WRITE, single, 4); in FPU_store_single()
745 FPU_put_user(templ, (unsigned long __user *)single); in FPU_store_single()
Dfpu_proto.h116 extern int FPU_load_single(float __user *single, FPU_REG *loaded_data);
126 float __user * single);
/arch/m68k/fpsp040/
Dutil.S109 beql ovff_sgl |force precision is single
124 beql ovff_sgl |the instruction is force single
143 movel #0x00000001,%d0 |set single
318 | 01 - single
361 beql unff_sgl |force precision is single
376 beql unff_sgl |force single
395 | Force single
440 | single 001 -> 01
451 cmpb #1,%d0 |check for single
Dbugfix.S348 | Check for opclass 2 and single size. If not both, exit.
451 | We have the opclass 2 single source situation.
457 cmpw #0x407F,ETEMP_EX(%a6) |single +max
462 cmpw #0xC07F,ETEMP_EX(%a6) |single -max
467 cmpw #0x3F80,ETEMP_EX(%a6) |single +min
472 cmpw #0xBF80,ETEMP_EX(%a6) |single -min
Dres_func.S475 | and bit 6 is set, round is forced to single. If both are clear,
477 | is double or single, the result is zero, and the mode is checked
493 cmpib #1,%d0 |check for single
511 | The move is fsmove or round precision is single. Result is zero.
519 bne cu_spd |load single pos zero
520 bra cu_spdr |load single pos zero w/lsb
523 bne cu_snd |load single neg zero
524 bra cu_sndr |load single neg zero w/lsb
568 | These routines write +/- zero in single format. The routines
569 | cu_dpdr and cu_dndr set the single lsb.
[all …]
Dsetox.S93 | constant := single-precision( 64/log 2 ).
95 | Using a single-precision constant avoids memory access.
96 | Another effect of using a single-precision "constant" is
104 | 3.1 R := X + N*L1, where L1 := single-precision(-log2/64).
131 | are single precision; A2 and A3 are double precision.
146 | and t is in single precision. Note also that T is rounded
/arch/avr32/mach-at32ap/
DKconfig14 The current code can only support a single external memory bus
/arch/cris/arch-v10/lib/
Dcsumcpfruser.S42 ;; Here from a failing single byte.
/arch/cris/arch-v32/lib/
Dcsumcpfruser.S42 ;; Here from a failing single byte.
/arch/um/
DKconfig.net28 The Ethertap User-Mode Linux network transport allows a single
84 UMLs on a single host). You may choose more than one without
92 UMLs on a single host to communicate with each other, but not to
103 If you'd like to set up a network with other UMLs on a single host,
116 UMLs on a single host to communicate with each other and also
/arch/ia64/hp/sim/boot/
Dbootloader.lds19 /* We want the small data sections together, so single-instruction offsets
/arch/alpha/lib/
Dev6-memset.S68 bic $1,7,$1 # E : fit within a single quadword?
248 bic $1,7,$1 # E : fit within a single quadword
432 bic $1,7,$1 # E : fit within a single quadword
/arch/powerpc/platforms/
DKconfig.cputype244 If you say N here, the kernel will run on single and multiprocessor
246 you say Y here, the kernel will run on single-processor machines.
247 On a single-processor machine, the kernel will run faster if you say
/arch/arm/mach-lh7a40x/
DKconfig62 together in a single node, incurring some wasted overhead
/arch/
DKconfig85 # arch_has_single_step() if there is hardware single-step support
/arch/frv/mm/
Dtlb-miss.S69 # we've got to re-enable single-stepping
108 # we've got to re-enable single-stepping
/arch/m68k/ifpsp060/
Dfplsp.doc79 There are 3 entry-points for each instruction type: single precision,
104 are passed in single precision format.
/arch/m68k/math-emu/
Dfp_util.S125 | args: %d0 = source (single-precision fp value)
/arch/blackfin/
DKconfig.debug153 bool "Compress single-level loops"
155 The trace buffer does not record single loops - helpful if trace

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