/arch/sh/mm/ |
D | tlb-sh5.c | 24 cpu_data->dtlb.step = 0x10; in sh64_tlb_init() 26 cpu_data->dtlb.first = DTLB_FIXED | cpu_data->dtlb.step; in sh64_tlb_init() 31 cpu_data->dtlb.step); in sh64_tlb_init() 35 cpu_data->itlb.step = 0x10; in sh64_tlb_init() 37 cpu_data->itlb.first = ITLB_FIXED | cpu_data->itlb.step; in sh64_tlb_init() 41 cpu_data->itlb.step); in sh64_tlb_init() 61 cpu_data->dtlb.first += cpu_data->dtlb.step; in sh64_get_wired_dtlb_entry() 62 cpu_data->dtlb.next += cpu_data->dtlb.step; in sh64_get_wired_dtlb_entry() 99 if (entry < (cpu_data->dtlb.first - cpu_data->dtlb.step)) in sh64_put_wired_dtlb_entry() 103 cpu_data->dtlb.first -= cpu_data->dtlb.step; in sh64_put_wired_dtlb_entry()
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/arch/sh/include/asm/ |
D | tlb_64.h | 31 tlb += cpu_data->dtlb.step) 41 tlb += cpu_data->itlb.step)
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D | processor.h | 58 unsigned int step; member
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/arch/frv/kernel/ |
D | break.S | 82 # catch the return from a TLB-miss handler that had single-step disabled 252 # step through an internal exception from kernel mode 259 # step through an external interrupt from kernel mode 336 # we also want to single step anyway, but after fixing up so that we get an event on the 360 # and then process the single step 363 # step through an internal exception from uspace mode 370 # step through an external interrupt from kernel mode 409 # step through an ITLB-miss handler from user mode 454 # step through a DTLB-miss handler from user mode 472 # step through a DTLB-miss handler from kernel mode
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D | entry-table.S | 39 # (5) The fixup table for kernel-trap single-step 40 # (6) The fixup table for user-trap single-step 42 # Due to the way single-stepping works on this CPU (single-step is not 44 # we have to catch the single-step event in break.S and jump to the fixup 49 # single-step bypass management
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/arch/arm/mach-pxa/ |
D | viper.c | 168 int step; in viper_set_core_cpu_voltage() local 171 step = divisor; in viper_set_core_cpu_voltage() 173 step = current_voltage_divisor + STEP; in viper_set_core_cpu_voltage() 175 step = current_voltage_divisor - STEP; in viper_set_core_cpu_voltage() 177 step = divisor; in viper_set_core_cpu_voltage() 186 gpio_set_value(VIPER_PSU_DATA_GPIO, step & i); in viper_set_core_cpu_voltage() 201 current_voltage_divisor = step; in viper_set_core_cpu_voltage()
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/arch/arm/include/asm/ |
D | vfpmacros.h | 29 addne \base, \base, #32*4 @ step over unused register space 45 addne \base, \base, #32*4 @ step over unused register space
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/arch/sh/kernel/ |
D | ptrace_32.c | 462 int step; in do_syscall_trace_leave() local 468 step = test_thread_flag(TIF_SINGLESTEP); in do_syscall_trace_leave() 469 if (step || test_thread_flag(TIF_SYSCALL_TRACE)) in do_syscall_trace_leave() 470 tracehook_report_syscall_exit(regs, step); in do_syscall_trace_leave()
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/arch/ia64/ |
D | Kconfig.debug | 30 are compiling for an Itanium A step processor 48 from step B3 or later don't have this problem. If you're unsure,
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/arch/powerpc/mm/ |
D | hash_utils_64.c | 178 unsigned int step, shift; in htab_bolt_mapping() local 182 step = 1 << shift; in htab_bolt_mapping() 190 vaddr += step, paddr += step) { in htab_bolt_mapping() 197 if (overlaps_kernel_text(vaddr, vaddr + step)) in htab_bolt_mapping() 222 unsigned int step, shift; in htab_remove_mapping() local 225 step = 1 << shift; in htab_remove_mapping() 233 for (vaddr = vstart; vaddr < vend; vaddr += step) in htab_remove_mapping()
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/arch/x86/kernel/cpu/cpufreq/ |
D | e_powersaver.c | 164 int k, step, voltage; in eps_cpu_init() local 276 step = ((max_voltage - min_voltage) * 256) in eps_cpu_init() 279 voltage = (k * step) / 256 + min_voltage; in eps_cpu_init()
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D | powernow-k8.c | 264 static int decrease_vid_code_by_step(struct powernow_k8_data *data, u32 reqvid, u32 step) in decrease_vid_code_by_step() argument 266 if ((data->currvid - reqvid) > step) in decrease_vid_code_by_step() 267 reqvid = data->currvid - step; in decrease_vid_code_by_step()
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/arch/sparc/lib/ |
D | udiv.S | 73 ! as our usual N-at-a-shot divide step will cause overflow and havoc. 113 ! %o5 > %o3: went too far: back up 1 step 119 ! first divide step without thinking. BUT, the others are conditional, 121 ! order bit set in the first step, just falling into the regular
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D | urem.S | 71 ! as our usual N-at-a-shot divide step will cause overflow and havoc. 111 ! %o5 > %o3: went too far: back up 1 step 117 ! first divide step without thinking. BUT, the others are conditional, 119 ! order bit set in the first step, just falling into the regular
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D | sdiv.S | 87 ! as our usual N-at-a-shot divide step will cause overflow and havoc. 127 ! %o5 > %o3: went too far: back up 1 step 133 ! first divide step without thinking. BUT, the others are conditional, 135 ! order bit set in the first step, just falling into the regular
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D | rem.S | 87 ! as our usual N-at-a-shot divide step will cause overflow and havoc. 128 ! %o5 > %o3: went too far: back up 1 step 134 ! first divide step without thinking. BUT, the others are conditional, 136 ! order bit set in the first step, just falling into the regular
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D | udivdi3.S | 50 ! Got carry from n. Subtract next step to cancel this carry. 87 ! Got carry from n. Subtract next step to cancel this carry. 113 ! Got carry from n. Subtract next step to cancel this carry. 192 ! Got carry from n. Subtract next step to cancel this carry.
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D | divdi3.S | 88 ! Got carry from n. Subtract next step to cancel this carry. 123 ! Got carry from n. Subtract next step to cancel this carry. 147 ! Got carry from n. Subtract next step to cancel this carry. 222 ! Got carry from n. Subtract next step to cancel this carry.
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/arch/ |
D | Kconfig | 85 # arch_has_single_step() if there is hardware single-step support 86 # arch_has_block_step() if there is hardware block-step support
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/arch/frv/mm/ |
D | tlb-flush.S | 69 # now, we assume that the TLB line step is page size in size 110 # now, we assume that the TLB line step is page size in size
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/arch/x86/kernel/cpu/mtrr/ |
D | generic.c | 191 static void print_fixed(unsigned base, unsigned step, const mtrr_type*types) in print_fixed() argument 195 for (i = 0; i < 8; ++i, ++types, base += step) in print_fixed() 197 base, base + step - 1, mtrr_attrib_to_str(*types)); in print_fixed()
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/arch/powerpc/kernel/ |
D | ptrace.c | 1057 int step; in do_syscall_trace_leave() local 1063 step = test_thread_flag(TIF_SINGLESTEP); in do_syscall_trace_leave() 1064 if (step || test_thread_flag(TIF_SYSCALL_TRACE)) in do_syscall_trace_leave() 1065 tracehook_report_syscall_exit(regs, step); in do_syscall_trace_leave()
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/arch/x86/kernel/ |
D | Makefile | 48 obj-y += step.o
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/arch/ia64/kernel/ |
D | ptrace.c | 1275 int step; in syscall_trace_leave() local 1286 step = test_thread_flag(TIF_SINGLESTEP); in syscall_trace_leave() 1287 if (step || test_thread_flag(TIF_SYSCALL_TRACE)) in syscall_trace_leave() 1288 tracehook_report_syscall_exit(®s, step); in syscall_trace_leave()
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/arch/m68k/fpsp040/ |
D | stan.S | 317 |--case, reduce argument by one remainder step to make subsequent reduction
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