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Searched refs:timer_regs (Results 1 – 3 of 3) sorted by relevance

/arch/cris/arch-v32/kernel/
Dtime.c39 unsigned long timer_regs[NR_CPUS] = variable
220 masked_intr = REG_RD(timer, timer_regs[cpu], r_masked_intr); in timer_interrupt()
226 REG_WR(timer, timer_regs[cpu], rw_ack_intr, ack_intr); in timer_interrupt()
290 REG_WR(timer, timer_regs[cpu], rw_tmr0_div, tmr0_div); in cris_timer_init()
291 REG_WR(timer, timer_regs[cpu], rw_tmr0_ctrl, tmr0_ctrl); /* Load */ in cris_timer_init()
293 REG_WR(timer, timer_regs[cpu], rw_tmr0_ctrl, tmr0_ctrl); /* Start */ in cris_timer_init()
296 timer_intr_mask = REG_RD(timer, timer_regs[cpu], rw_intr_mask); in cris_timer_init()
298 REG_WR(timer, timer_regs[cpu], rw_intr_mask, timer_intr_mask); in cris_timer_init()
378 data = REG_RD(timer, timer_regs[freqs->cpu], in cris_time_freq_notifier()
381 REG_WR(timer, timer_regs[freqs->cpu], rw_tmr0_div, div); in cris_time_freq_notifier()
/arch/blackfin/kernel/
Dgptimers.c44 static volatile GPTIMER_timer_regs *const timer_regs[MAX_BLACKFIN_GPTIMERS] = variable
143 timer_regs[timer_id]->width = value; in set_gptimer_pwidth()
151 return timer_regs[timer_id]->width; in get_gptimer_pwidth()
158 timer_regs[timer_id]->period = period; in set_gptimer_period()
166 return timer_regs[timer_id]->period; in get_gptimer_period()
173 return timer_regs[timer_id]->counter; in get_gptimer_count()
223 timer_regs[timer_id]->config = config; in set_gptimer_config()
231 return timer_regs[timer_id]->config; in get_gptimer_config()
266 timer_regs[timer_id]->config |= TIMER_PULSE_HI; in set_gptimer_pulse_hi()
274 timer_regs[timer_id]->config &= ~TIMER_PULSE_HI; in clear_gptimer_pulse_hi()
/arch/cris/include/arch-v32/arch/hwregs/
DMakefile64 REGDESC += $(BASEDIR)/io/timer/rtl/timer_regs.r
143 timer_defs.h: $(BASEDIR)/io/timer/rtl/timer_regs.r