| /arch/x86/include/asm/ |
| D | posix_types_64.h | 79 unsigned long *tmp = p->fds_bits; in __FD_ZERO() local
85 tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; in __FD_ZERO()
86 tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; in __FD_ZERO()
87 tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0; in __FD_ZERO()
88 tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0; in __FD_ZERO()
89 tmp[16] = 0; tmp[17] = 0; tmp[18] = 0; tmp[19] = 0; in __FD_ZERO()
90 tmp[20] = 0; tmp[21] = 0; tmp[22] = 0; tmp[23] = 0; in __FD_ZERO()
91 tmp[24] = 0; tmp[25] = 0; tmp[26] = 0; tmp[27] = 0; in __FD_ZERO()
92 tmp[28] = 0; tmp[29] = 0; tmp[30] = 0; tmp[31] = 0; in __FD_ZERO()
95 tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; in __FD_ZERO()
[all …]
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| /arch/sparc/include/asm/ |
| D | posix_types.h | 116 unsigned long *tmp = p->fds_bits; in __FD_ZERO() local
122 tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; in __FD_ZERO()
123 tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; in __FD_ZERO()
124 tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0; in __FD_ZERO()
125 tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0; in __FD_ZERO()
126 tmp[16] = 0; tmp[17] = 0; tmp[18] = 0; tmp[19] = 0; in __FD_ZERO()
127 tmp[20] = 0; tmp[21] = 0; tmp[22] = 0; tmp[23] = 0; in __FD_ZERO()
128 tmp[24] = 0; tmp[25] = 0; tmp[26] = 0; tmp[27] = 0; in __FD_ZERO()
129 tmp[28] = 0; tmp[29] = 0; tmp[30] = 0; tmp[31] = 0; in __FD_ZERO()
132 tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; in __FD_ZERO()
[all …]
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| /arch/arm/plat-mxc/ |
| D | iomux-mx1-mx2.c | 42 unsigned int tmp; in mxc_gpio_mode() local
45 tmp = __raw_readl(VA_GPIO_BASE + MXC_PUEN(port)); in mxc_gpio_mode()
47 tmp |= (1 << pin); in mxc_gpio_mode()
49 tmp &= ~(1 << pin); in mxc_gpio_mode()
50 __raw_writel(tmp, VA_GPIO_BASE + MXC_PUEN(port)); in mxc_gpio_mode()
53 tmp = __raw_readl(VA_GPIO_BASE + MXC_DDIR(port)); in mxc_gpio_mode()
55 tmp |= 1 << pin; in mxc_gpio_mode()
57 tmp &= ~(1 << pin); in mxc_gpio_mode()
58 __raw_writel(tmp, VA_GPIO_BASE + MXC_DDIR(port)); in mxc_gpio_mode()
61 tmp = __raw_readl(VA_GPIO_BASE + MXC_GPR(port)); in mxc_gpio_mode()
[all …]
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| /arch/ia64/include/asm/ |
| D | posix_types.h | 94 unsigned long *tmp = p->fds_bits; in __FD_ZERO() local
100 tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; in __FD_ZERO()
101 tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; in __FD_ZERO()
102 tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0; in __FD_ZERO()
103 tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0; in __FD_ZERO()
107 tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; in __FD_ZERO()
108 tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; in __FD_ZERO()
112 tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; in __FD_ZERO()
119 *tmp = 0; in __FD_ZERO()
120 tmp++; in __FD_ZERO()
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| /arch/alpha/include/asm/ |
| D | posix_types.h | 89 unsigned long *tmp = p->fds_bits; in __FD_ZERO() local
95 tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; in __FD_ZERO()
96 tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; in __FD_ZERO()
97 tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0; in __FD_ZERO()
98 tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0; in __FD_ZERO()
102 tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; in __FD_ZERO()
103 tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; in __FD_ZERO()
107 tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; in __FD_ZERO()
114 *tmp = 0; in __FD_ZERO()
115 tmp++; in __FD_ZERO()
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| /arch/xtensa/include/asm/ |
| D | tlbflush.h | 48 unsigned long tmp; in itlb_probe() local
49 __asm__ __volatile__("pitlb %0, %1\n\t" : "=a" (tmp) : "a" (addr)); in itlb_probe()
50 return tmp; in itlb_probe()
55 unsigned long tmp; in dtlb_probe() local
56 __asm__ __volatile__("pdtlb %0, %1\n\t" : "=a" (tmp) : "a" (addr)); in dtlb_probe()
57 return tmp; in dtlb_probe()
107 unsigned long tmp; in read_ptevaddr_register() local
108 __asm__ __volatile__("rsr %0, "__stringify(PTEVADDR)"\n\t" : "=a" (tmp)); in read_ptevaddr_register()
109 return tmp; in read_ptevaddr_register()
163 unsigned long tmp; in read_dtlb_virtual() local
[all …]
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| D | rwsem.h | 72 int tmp; in __down_read_trylock() local
74 while ((tmp = sem->count) >= 0) { in __down_read_trylock()
75 if (tmp == cmpxchg(&sem->count, tmp, in __down_read_trylock()
76 tmp + RWSEM_ACTIVE_READ_BIAS)) { in __down_read_trylock()
89 int tmp; in __down_write() local
91 tmp = atomic_add_return(RWSEM_ACTIVE_WRITE_BIAS, in __down_write()
93 if (tmp == RWSEM_ACTIVE_WRITE_BIAS) in __down_write()
101 int tmp; in __down_write_trylock() local
103 tmp = cmpxchg(&sem->count, RWSEM_UNLOCKED_VALUE, in __down_write_trylock()
106 return tmp == RWSEM_UNLOCKED_VALUE; in __down_write_trylock()
[all …]
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| /arch/sh/include/asm/ |
| D | atomic-grb.h | 6 int tmp; in atomic_add() local
17 : "=&r" (tmp), in atomic_add()
25 int tmp; in atomic_sub() local
36 : "=&r" (tmp), in atomic_sub()
44 int tmp; in atomic_add_return() local
55 : "=&r" (tmp), in atomic_add_return()
60 return tmp; in atomic_add_return()
65 int tmp; in atomic_sub_return() local
76 : "=&r" (tmp), in atomic_sub_return()
81 return tmp; in atomic_sub_return()
[all …]
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| D | spinlock.h | 39 unsigned long tmp; in __raw_spin_lock() local
51 : "=&z" (tmp), "=&r" (oldval) in __raw_spin_lock()
59 unsigned long tmp; in __raw_spin_unlock() local
64 : "=&z" (tmp) in __raw_spin_unlock()
72 unsigned long tmp, oldval; in __raw_spin_trylock() local
82 : "=&z" (tmp), "=&r" (oldval) in __raw_spin_trylock()
113 unsigned long tmp; in __raw_read_lock() local
123 : "=&z" (tmp) in __raw_read_lock()
131 unsigned long tmp; in __raw_read_unlock() local
139 : "=&z" (tmp) in __raw_read_unlock()
[all …]
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| D | rwsem.h | 86 int tmp; in __down_read_trylock() local
88 while ((tmp = sem->count) >= 0) { in __down_read_trylock()
89 if (tmp == cmpxchg(&sem->count, tmp, in __down_read_trylock()
90 tmp + RWSEM_ACTIVE_READ_BIAS)) { in __down_read_trylock()
103 int tmp; in __down_write() local
105 tmp = atomic_add_return(RWSEM_ACTIVE_WRITE_BIAS, in __down_write()
107 if (tmp == RWSEM_ACTIVE_WRITE_BIAS) in __down_write()
115 int tmp; in __down_write_trylock() local
117 tmp = cmpxchg(&sem->count, RWSEM_UNLOCKED_VALUE, in __down_write_trylock()
120 return tmp == RWSEM_UNLOCKED_VALUE; in __down_write_trylock()
[all …]
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| /arch/mips/sgi-ip22/ |
| D | ip22-mc.c | 59 unsigned int tmp = get_bank_config(i); in probe_memory() local
60 if (!(tmp & SGIMC_MCONFIG_BVALID)) in probe_memory()
63 bank[cnt].size = get_bank_size(tmp); in probe_memory()
64 bank[cnt].addr = get_bank_addr(tmp); in probe_memory()
110 u32 tmp; in sgimc_init() local
127 tmp = sgimc->cpuctrl0; in sgimc_init()
128 tmp &= ~SGIMC_CCTRL0_WDOG; in sgimc_init()
129 sgimc->cpuctrl0 = tmp; in sgimc_init()
143 tmp = sgimc->cpuctrl0; in sgimc_init()
144 tmp |= (SGIMC_CCTRL0_EPERRGIO | SGIMC_CCTRL0_EPERRMEM | in sgimc_init()
[all …]
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| /arch/mips/include/asm/ |
| D | spinlock.h | 59 int tmp; in __raw_spin_lock() local
93 [ticket] "=&r" (tmp), in __raw_spin_lock()
130 [ticket] "=&r" (tmp), in __raw_spin_lock()
139 int tmp; in __raw_spin_unlock() local
153 [ticket] "=&r" (tmp)); in __raw_spin_unlock()
173 [ticket] "=&r" (tmp)); in __raw_spin_unlock()
179 int tmp, tmp2, tmp3; in __raw_spin_trylock() local
202 [ticket] "=&r" (tmp), in __raw_spin_trylock()
228 [ticket] "=&r" (tmp), in __raw_spin_trylock()
235 return tmp; in __raw_spin_trylock()
[all …]
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| /arch/m68k/include/asm/ |
| D | raw_io.h | 82 unsigned int tmp; in raw_insw() local
85 tmp = (nr & 15) - 1; in raw_insw()
88 : "=a" (buf), "=d" (tmp) in raw_insw()
90 "1" (tmp)); in raw_insw()
93 tmp = (nr >> 4) - 1; in raw_insw()
113 : "=a" (buf), "=d" (tmp) in raw_insw()
115 "1" (tmp)); in raw_insw()
122 unsigned int tmp; in raw_outsw() local
125 tmp = (nr & 15) - 1; in raw_outsw()
128 : "=a" (buf), "=d" (tmp) in raw_outsw()
[all …]
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| /arch/powerpc/include/asm/ |
| D | posix_types.h | 101 unsigned long *tmp = (unsigned long *)p->fds_bits; in __FD_ZERO() local
107 tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0; in __FD_ZERO()
108 tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0; in __FD_ZERO()
111 tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; in __FD_ZERO()
114 tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; in __FD_ZERO()
121 *tmp = 0; in __FD_ZERO()
122 tmp++; in __FD_ZERO()
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| D | rwsem.h | 79 int tmp; in __down_read_trylock() local
81 while ((tmp = sem->count) >= 0) { in __down_read_trylock()
82 if (tmp == cmpxchg(&sem->count, tmp, in __down_read_trylock()
83 tmp + RWSEM_ACTIVE_READ_BIAS)) { in __down_read_trylock()
95 int tmp; in __down_write_nested() local
97 tmp = atomic_add_return(RWSEM_ACTIVE_WRITE_BIAS, in __down_write_nested()
99 if (unlikely(tmp != RWSEM_ACTIVE_WRITE_BIAS)) in __down_write_nested()
110 int tmp; in __down_write_trylock() local
112 tmp = cmpxchg(&sem->count, RWSEM_UNLOCKED_VALUE, in __down_write_trylock()
114 return tmp == RWSEM_UNLOCKED_VALUE; in __down_write_trylock()
[all …]
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| /arch/mips/include/asm/octeon/ |
| D | cvmx-spinlock.h | 105 unsigned int tmp; in cvmx_spinlock_trylock() local
117 [val] "+m"(lock->value), [tmp] "=&r"(tmp) in cvmx_spinlock_trylock()
120 return tmp != 0; /* normalize to 0 or 1 */ in cvmx_spinlock_trylock()
130 unsigned int tmp; in cvmx_spinlock_lock() local
140 [val] "+m"(lock->value), [tmp] "=&r"(tmp) in cvmx_spinlock_lock()
163 unsigned int tmp; in cvmx_spinlock_bit_lock() local
177 [val] "+m"(*word), [tmp] "=&r"(tmp), [sav] "=&r"(sav) in cvmx_spinlock_bit_lock()
195 unsigned int tmp; in cvmx_spinlock_bit_trylock() local
210 [val] "+m"(*word), [tmp] "=&r"(tmp) in cvmx_spinlock_bit_trylock()
213 return tmp != 0; /* normalize to 0 or 1 */ in cvmx_spinlock_bit_trylock()
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| /arch/m68knommu/kernel/ |
| D | ptrace.c | 96 unsigned long tmp; in ptrace_disable() local
98 tmp = get_reg(child, PT_SR) & ~(TRACE_BITS << 16); in ptrace_disable()
99 put_reg(child, PT_SR, tmp); in ptrace_disable()
115 unsigned long tmp; in arch_ptrace() local
122 tmp = 0; /* Default return condition */ in arch_ptrace()
126 tmp = get_reg(child, addr); in arch_ptrace()
128 tmp >>= 16; in arch_ptrace()
130 tmp = child->thread.fp[addr - 21]; in arch_ptrace()
136 tmp = ((tmp & 0xffff0000) << 15) | in arch_ptrace()
137 ((tmp & 0x0000ffff) << 16); in arch_ptrace()
[all …]
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| /arch/alpha/math-emu/ |
| D | qrnnd.S | 41 #define tmp $3 macro
52 $loop1: cmplt n0,0,tmp
54 bis n1,tmp,n1
57 subq n1,d,tmp
58 cmovne qb,tmp,n1
60 cmplt n0,0,tmp
62 bis n1,tmp,n1
65 subq n1,d,tmp
66 cmovne qb,tmp,n1
68 cmplt n0,0,tmp
[all …]
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| /arch/arm/include/asm/ |
| D | spinlock.h | 28 unsigned long tmp; in __raw_spin_lock() local
39 : "=&r" (tmp) in __raw_spin_lock()
48 unsigned long tmp; in __raw_spin_trylock() local
54 : "=&r" (tmp) in __raw_spin_trylock()
58 if (tmp == 0) { in __raw_spin_trylock()
91 unsigned long tmp; in __raw_write_lock() local
102 : "=&r" (tmp) in __raw_write_lock()
111 unsigned long tmp; in __raw_write_trylock() local
117 : "=&r" (tmp) in __raw_write_trylock()
121 if (tmp == 0) { in __raw_write_trylock()
[all …]
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| /arch/blackfin/kernel/ |
| D | ptrace.c | 188 unsigned long tmp; in ptrace_enable() local
189 tmp = get_reg(child, PT_SYSCFG) | (TRACE_BITS); in ptrace_enable()
190 put_reg(child, PT_SYSCFG, tmp); in ptrace_enable()
200 unsigned long tmp; in ptrace_disable() local
202 tmp = get_reg(child, PT_SYSCFG) & ~TRACE_BITS; in ptrace_disable()
203 put_reg(child, PT_SYSCFG, tmp); in ptrace_disable()
218 unsigned long tmp = 0; in arch_ptrace() local
223 if (is_user_addr_valid(child, addr, sizeof(tmp)) < 0) in arch_ptrace()
228 && addr + sizeof(tmp) <= get_l1_code_start() + L1_CODE_LENGTH) { in arch_ptrace()
229 safe_dma_memcpy (&tmp, (const void *)(addr), sizeof(tmp)); in arch_ptrace()
[all …]
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| /arch/mips/mm/ |
| D | sc-mips.c | 59 unsigned int tmp; in mips_sc_probe() local
77 tmp = (config2 >> 4) & 0x0f; in mips_sc_probe()
78 if (0 < tmp && tmp <= 7) in mips_sc_probe()
79 c->scache.linesz = 2 << tmp; in mips_sc_probe()
83 tmp = (config2 >> 8) & 0x0f; in mips_sc_probe()
84 if (0 <= tmp && tmp <= 7) in mips_sc_probe()
85 c->scache.sets = 64 << tmp; in mips_sc_probe()
89 tmp = (config2 >> 0) & 0x0f; in mips_sc_probe()
90 if (0 <= tmp && tmp <= 7) in mips_sc_probe()
91 c->scache.ways = tmp + 1; in mips_sc_probe()
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| /arch/mn10300/kernel/ |
| D | gdb-io-ttysm.c | 41 int tmp; in gdbstub_io_init() local
66 tmp = *gdbstub_port->rx_icr; in gdbstub_io_init()
84 tmp = *gdbstub_port->_control; in gdbstub_io_init()
103 unsigned xdiv, tmp; in gdbstub_io_set_baud() local
120 tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1; in gdbstub_io_set_baud()
121 if (tmp > 0 && tmp <= 65535) in gdbstub_io_set_baud()
125 tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1; in gdbstub_io_set_baud()
126 if (tmp > 0 && tmp <= 65535) in gdbstub_io_set_baud()
130 tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1; in gdbstub_io_set_baud()
131 if (tmp > 0 && tmp <= 65535) in gdbstub_io_set_baud()
[all …]
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| D | ptrace.c | 109 long tmp; in ptrace_disable() local
111 tmp = get_stack_long(child, (unsigned long) &dummy->regs.epsw); in ptrace_disable()
112 tmp &= ~EPSW_T; in ptrace_disable()
113 put_stack_long(child, (unsigned long) &dummy->regs.epsw, tmp); in ptrace_disable()
124 long tmp; in ptrace_enable() local
126 tmp = get_stack_long(child, (unsigned long) &dummy->regs.epsw); in ptrace_enable()
127 tmp |= EPSW_T; in ptrace_enable()
128 put_stack_long(child, (unsigned long) &dummy->regs.epsw, tmp); in ptrace_enable()
143 unsigned long tmp; in arch_ptrace() local
146 copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0); in arch_ptrace()
[all …]
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| /arch/mips/kernel/ |
| D | ptrace32.c | 64 u32 tmp; in compat_arch_ptrace() local
74 copied = access_process_vm(child, (u64)addrOthers, &tmp, in compat_arch_ptrace()
75 sizeof(tmp), 0); in compat_arch_ptrace()
76 if (copied != sizeof(tmp)) in compat_arch_ptrace()
78 ret = put_user(tmp, (u32 __user *) (unsigned long) data); in compat_arch_ptrace()
85 unsigned int tmp; in compat_arch_ptrace() local
92 tmp = regs->regs[addr]; in compat_arch_ptrace()
104 tmp = (unsigned long) (fregs[((addr & ~1) - 32)] >> 32); in compat_arch_ptrace()
106 tmp = (unsigned long) (fregs[(addr - 32)] & 0xffffffff); in compat_arch_ptrace()
108 tmp = -1; /* FP not yet used */ in compat_arch_ptrace()
[all …]
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| /arch/avr32/include/asm/ |
| D | asm.h | 44 .macro save_min sr, tmp=lr
46 mfsr \tmp, \sr
48 st.w --sp, \tmp
51 .macro restore_min sr, tmp=lr
52 ld.w \tmp, sp++
53 mtsr \sr, \tmp
57 .macro save_half sr, tmp=lr
61 mfsr \tmp, \sr
62 st.w --sp, \tmp
65 .macro restore_half sr, tmp=lr
[all …]
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