Home
last modified time | relevance | path

Searched refs:tmp1 (Results 1 – 25 of 70) sorted by relevance

123

/arch/sparc/include/asm/
Dhead_64.h30 #define BRANCH_IF_SUN4V(tmp1,label) \ argument
31 sethi %hi(is_sun4v), %tmp1; \
32 lduw [%tmp1 + %lo(is_sun4v)], %tmp1; \
33 brnz,pn %tmp1, label; \
36 #define BRANCH_IF_CHEETAH_BASE(tmp1,tmp2,label) \ argument
37 rdpr %ver, %tmp1; \
39 srlx %tmp1, 32, %tmp1; \
41 cmp %tmp1, %tmp2; \
45 #define BRANCH_IF_JALAPENO(tmp1,tmp2,label) \ argument
46 rdpr %ver, %tmp1; \
[all …]
Dspinlock_64.h73 unsigned long tmp1, tmp2; in __raw_spin_lock_flags() local
88 : "=&r" (tmp1), "=&r" (tmp2) in __raw_spin_lock_flags()
97 unsigned long tmp1, tmp2; in __read_lock() local
113 : "=&r" (tmp1), "=&r" (tmp2) in __read_lock()
120 int tmp1, tmp2; in __read_trylock() local
132 : "=&r" (tmp1), "=&r" (tmp2) in __read_trylock()
136 return tmp1; in __read_trylock()
141 unsigned long tmp1, tmp2; in __read_unlock() local
150 : "=&r" (tmp1), "=&r" (tmp2) in __read_unlock()
157 unsigned long mask, tmp1, tmp2; in __write_lock() local
[all …]
Dpgtsrmmu.h130 #define WINDOW_FLUSH(tmp1, tmp2) \ argument
131 mov 0, tmp1; \
134 add tmp1, 1, tmp1; \
137 99: subcc tmp1, 1, tmp1; \
Datomic_32.h100 register int tmp1 asm("g3"); in __atomic24_add()
111 : "=&r" (increment), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3) in __atomic24_add()
122 register int tmp1 asm("g3"); in __atomic24_sub()
133 : "=&r" (increment), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3) in __atomic24_sub()
Dsystem_64.h201 unsigned long tmp1, tmp2; in xchg32() local
210 : "=&r" (val), "=&r" (tmp1), "=&r" (tmp2) in xchg32()
218 unsigned long tmp1, tmp2; in xchg64() local
227 : "=&r" (val), "=&r" (tmp1), "=&r" (tmp2) in xchg64()
/arch/s390/lib/
Duaccess_std.c34 unsigned long tmp1, tmp2; in copy_from_user_std() local
36 tmp1 = -256UL; in copy_from_user_std()
68 : "+a" (size), "+a" (ptr), "+a" (x), "+a" (tmp1), "=a" (tmp2) in copy_from_user_std()
83 unsigned long tmp1, tmp2; in copy_to_user_std() local
85 tmp1 = -256UL; in copy_to_user_std()
107 : "+a" (size), "+a" (ptr), "+a" (x), "+a" (tmp1), "=a" (tmp2) in copy_to_user_std()
123 unsigned long tmp1; in copy_in_user_std() local
147 : "+a" (size), "+a" (to), "+a" (from), "=a" (tmp1) in copy_in_user_std()
154 unsigned long tmp1, tmp2; in clear_user_std() local
183 : "+a" (size), "+a" (to), "=a" (tmp1), "=a" (tmp2) in clear_user_std()
[all …]
Duaccess_mvcos.c34 unsigned long tmp1, tmp2; in copy_from_user_mvcos() local
36 tmp1 = -4096UL; in copy_from_user_mvcos()
65 : "+a" (size), "+a" (ptr), "+a" (x), "+a" (tmp1), "=a" (tmp2) in copy_from_user_mvcos()
80 unsigned long tmp1, tmp2; in copy_to_user_mvcos() local
82 tmp1 = -4096UL; in copy_to_user_mvcos()
101 : "+a" (size), "+a" (ptr), "+a" (x), "+a" (tmp1), "=a" (tmp2) in copy_to_user_mvcos()
118 unsigned long tmp1, tmp2; in copy_in_user_mvcos() local
120 tmp1 = -4096UL; in copy_in_user_mvcos()
132 : "+a" (size), "+a" (to), "+a" (from), "+a" (tmp1), "=a" (tmp2) in copy_in_user_mvcos()
140 unsigned long tmp1, tmp2; in clear_user_mvcos() local
[all …]
/arch/ia64/lib/
Ddo_csum.S104 #define tmp1 r26 macro
135 add tmp1=buf,len // last byte's address
148 adds tmp2=-1,tmp1 // last-1
149 and lastoff=7,tmp1 // how many bytes off for last element
151 sub tmp1=8,lastoff // complement to lastoff
160 and tmp1=7, tmp1 // make sure that if tmp1==8 -> tmp1=0
164 shl tmp1=tmp1,3 // number of bits
169 shr.u tmask=tmask,tmp1 // build tail mask, mask off ]8,lastoff]
262 zxt4 tmp1=result1[0]
265 add result1[0]=tmp1,tmp2
[all …]
/arch/m68k/lib/
Dchecksum.c44 unsigned long tmp1, tmp2; in csum_partial() local
122 "=&d" (tmp1), "=&d" (tmp2) in csum_partial()
144 unsigned long tmp1, tmp2; in csum_partial_copy_from_user() local
314 "=&d" (tmp1), "=d" (tmp2) in csum_partial_copy_from_user()
333 unsigned long tmp1, tmp2; in csum_partial_copy_nocheck() local
420 "=&d" (tmp1), "=&d" (tmp2) in csum_partial_copy_nocheck()
/arch/arm/mach-iop32x/include/mach/
Dentry-macro.S31 .macro arch_ret_to_user, tmp1, tmp2
32 mrc p15, 0, \tmp1, c15, c1, 0
33 ands \tmp2, \tmp1, #(1 << 6)
34 bicne \tmp1, \tmp1, #(1 << 6)
35 mcrne p15, 0, \tmp1, c15, c1, 0 @ Disable cp6 access
/arch/arm/mach-iop13xx/include/mach/
Dentry-macro.S40 .macro arch_ret_to_user, tmp1, tmp2
41 mrc p15, 0, \tmp1, c15, c1, 0
42 ands \tmp2, \tmp1, #(1 << 6)
43 bicne \tmp1, \tmp1, #(1 << 6)
44 mcrne p15, 0, \tmp1, c15, c1, 0 @ Disable cp6 access
/arch/arm/mach-iop33x/include/mach/
Dentry-macro.S32 .macro arch_ret_to_user, tmp1, tmp2
33 mrc p15, 0, \tmp1, c15, c1, 0
34 ands \tmp2, \tmp1, #(1 << 6)
35 bicne \tmp1, \tmp1, #(1 << 6)
36 mcrne p15, 0, \tmp1, c15, c1, 0 @ Disable cp6 access
/arch/alpha/lib/
Ddivide.S56 #define tmp1 $3 macro
108 stq tmp1,24($30)
140 subq modulus,divisor,tmp1
143 cmovne compare,tmp1,modulus
149 ldq tmp1,24($30)
181 stq tmp1,24($30)
188 subq $31,$27,tmp1
191 cmovlt $28,tmp1,$27
192 ldq tmp1,24($30)
Dev6-divide.S66 #define tmp1 $3 macro
120 stq tmp1,24($30) # L :
171 subq modulus,divisor,tmp1 # E :
180 cmovne compare,tmp1,modulus # E : Latency 2, extra map slot
185 cmovne compare,tmp1,modulus # E : Latency 2, extra map slot
196 ldq tmp1,24($30) # L :
240 stq tmp1,24($30) # L :
248 subq $31,$27,tmp1 # E : U U L L
252 cmovlt $28,tmp1,$27 # E : Latency 2, extra map slot
255 ldq tmp1,24($30) # L :
/arch/alpha/kernel/
Dtraps.c457 long error, tmp1, tmp2, tmp3, tmp4; in do_entUna() local
484 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) in do_entUna()
488 una_reg(reg) = tmp1|tmp2; in do_entUna()
504 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) in do_entUna()
508 una_reg(reg) = (int)(tmp1|tmp2); in do_entUna()
524 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) in do_entUna()
528 una_reg(reg) = tmp1|tmp2; in do_entUna()
557 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2), in do_entUna()
587 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2), in do_entUna()
617 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2), in do_entUna()
[all …]
/arch/mips/mm/
Dsc-ip22.c89 unsigned long addr, tmp1, tmp2; in indy_sc_enable() local
115 : "=r" (tmp1), "=r" (tmp2), "=r" (addr)); in indy_sc_enable()
120 unsigned long tmp1, tmp2, tmp3; in indy_sc_disable() local
145 : "=r" (tmp1), "=r" (tmp2), "=r" (tmp3)); in indy_sc_disable()
/arch/mips/pmc-sierra/yosemite/
Dht.c290 u8 tmp1; in pcibios_enable_resources() local
318 titan_ht_config_read_byte(dev, PCI_CACHE_LINE_SIZE, &tmp1); in pcibios_enable_resources()
320 if (tmp1 != 8) { in pcibios_enable_resources()
322 "%d\n", tmp1); in pcibios_enable_resources()
329 titan_ht_config_read_byte(dev, PCI_LATENCY_TIMER, &tmp1); in pcibios_enable_resources()
331 if (tmp1 < 32 || tmp1 == 0xff) { in pcibios_enable_resources()
333 tmp1); in pcibios_enable_resources()
/arch/x86/kernel/cpu/cpufreq/
Dgx-suspmod.c331 u8 tmp1, tmp2; in cpufreq_gx_verify() local
345 tmp_freq = gx_validate_speed(policy->min, &tmp1, &tmp2); in cpufreq_gx_verify()
351 tmp_freq = gx_validate_speed(policy->max, &tmp1, &tmp2); in cpufreq_gx_verify()
370 u8 tmp1, tmp2; in cpufreq_gx_target() local
378 tmp_freq = gx_validate_speed(target_freq, &tmp1, &tmp2); in cpufreq_gx_target()
381 tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2); in cpufreq_gx_target()
385 tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2); in cpufreq_gx_target()
/arch/sh/lib/
Dio.c69 int tmp1; in __raw_writesl() local
77 : "=&r" (data), "=&r" (tmp1) in __raw_writesl()
/arch/sh/boards/mach-migor/
Dlcd_qvga.c45 unsigned long tmp1, tmp2; in adjust_reg18() local
47 tmp1 = (data<<1 | 0x00000001) & 0x000001FF; in adjust_reg18()
49 return tmp1 | tmp2; in adjust_reg18()
/arch/arm/include/asm/
Dchecksum.h62 unsigned int tmp1; in ip_fast_csum() local
80 : "=r" (sum), "=r" (iph), "=r" (ihl), "=r" (tmp1) in ip_fast_csum()
/arch/sparc/math-emu/
Dsfp-util_64.h44 UDItype tmp1, tmp2, tmp3, tmp4; \
69 "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4) \
/arch/arm/plat-omap/include/mach/
Dentry-macro.S36 .macro arch_ret_to_user, tmp1, tmp2
77 .macro arch_ret_to_user, tmp1, tmp2
/arch/arm/mach-rpc/include/mach/
Dentry-macro.S14 .macro arch_ret_to_user, tmp1, tmp2
/arch/x86/kernel/
Dpvclock.c44 u32 tmp1, tmp2; in scale_delta() local
61 : "=A" (product), "=r" (tmp1), "=r" (tmp2) in scale_delta()

123