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Searched refs:tmp2 (Results 1 – 25 of 71) sorted by relevance

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/arch/sparc/include/asm/
Dhead_64.h36 #define BRANCH_IF_CHEETAH_BASE(tmp1,tmp2,label) \ argument
38 sethi %hi(__CHEETAH_ID), %tmp2; \
40 or %tmp2, %lo(__CHEETAH_ID), %tmp2;\
41 cmp %tmp1, %tmp2; \
45 #define BRANCH_IF_JALAPENO(tmp1,tmp2,label) \ argument
47 sethi %hi(__JALAPENO_ID), %tmp2; \
49 or %tmp2, %lo(__JALAPENO_ID), %tmp2;\
50 cmp %tmp1, %tmp2; \
54 #define BRANCH_IF_CHEETAH_PLUS_OR_FOLLOWON(tmp1,tmp2,label) \ argument
56 srlx %tmp1, (32 + 16), %tmp2; \
[all …]
Dspinlock_64.h73 unsigned long tmp1, tmp2; in __raw_spin_lock_flags() local
88 : "=&r" (tmp1), "=&r" (tmp2) in __raw_spin_lock_flags()
97 unsigned long tmp1, tmp2; in __read_lock() local
113 : "=&r" (tmp1), "=&r" (tmp2) in __read_lock()
120 int tmp1, tmp2; in __read_trylock() local
132 : "=&r" (tmp1), "=&r" (tmp2) in __read_trylock()
141 unsigned long tmp1, tmp2; in __read_unlock() local
150 : "=&r" (tmp1), "=&r" (tmp2) in __read_unlock()
157 unsigned long mask, tmp1, tmp2; in __write_lock() local
175 : "=&r" (tmp1), "=&r" (tmp2) in __write_lock()
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Datomic_32.h101 register int tmp2 asm("g4"); in __atomic24_add()
111 : "=&r" (increment), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3) in __atomic24_add()
123 register int tmp2 asm("g4"); in __atomic24_sub()
133 : "=&r" (increment), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3) in __atomic24_sub()
Dsystem_64.h201 unsigned long tmp1, tmp2; in xchg32() local
210 : "=&r" (val), "=&r" (tmp1), "=&r" (tmp2) in xchg32()
218 unsigned long tmp1, tmp2; in xchg64() local
227 : "=&r" (val), "=&r" (tmp1), "=&r" (tmp2) in xchg64()
Dpgtsrmmu.h130 #define WINDOW_FLUSH(tmp1, tmp2) \ argument
132 98: ld [%g6 + TI_UWINMASK], tmp2; \
133 orcc %g0, tmp2, %g0; \
/arch/m68k/lib/
Dchecksum.c44 unsigned long tmp1, tmp2; in csum_partial() local
122 "=&d" (tmp1), "=&d" (tmp2) in csum_partial()
144 unsigned long tmp1, tmp2; in csum_partial_copy_from_user() local
314 "=&d" (tmp1), "=d" (tmp2) in csum_partial_copy_from_user()
318 *csum_err = tmp2; in csum_partial_copy_from_user()
333 unsigned long tmp1, tmp2; in csum_partial_copy_nocheck() local
420 "=&d" (tmp1), "=&d" (tmp2) in csum_partial_copy_nocheck()
/arch/arm/include/asm/
Dspinlock.h161 unsigned long tmp, tmp2; in __raw_read_lock() local
172 : "=&r" (tmp), "=&r" (tmp2) in __raw_read_lock()
181 unsigned long tmp, tmp2; in __raw_read_unlock() local
196 : "=&r" (tmp), "=&r" (tmp2) in __raw_read_unlock()
203 unsigned long tmp, tmp2 = 1; in __raw_read_trylock() local
209 : "=&r" (tmp), "+r" (tmp2) in __raw_read_trylock()
214 return tmp2 == 0; in __raw_read_trylock()
/arch/s390/lib/
Duaccess_std.c34 unsigned long tmp1, tmp2; in copy_from_user_std() local
68 : "+a" (size), "+a" (ptr), "+a" (x), "+a" (tmp1), "=a" (tmp2) in copy_from_user_std()
83 unsigned long tmp1, tmp2; in copy_to_user_std() local
107 : "+a" (size), "+a" (ptr), "+a" (x), "+a" (tmp1), "=a" (tmp2) in copy_to_user_std()
154 unsigned long tmp1, tmp2; in clear_user_std() local
183 : "+a" (size), "+a" (to), "=a" (tmp1), "=a" (tmp2) in clear_user_std()
191 unsigned long tmp1, tmp2; in strnlen_user_std() local
204 : "+a" (size), "+a" (src), "=a" (tmp1), "=a" (tmp2) in strnlen_user_std()
212 unsigned long tmp1, tmp2; in strncpy_from_user_std() local
238 : "+a" (size), "+a" (src), "+d" (dst), "=a" (tmp1), "=a" (tmp2) in strncpy_from_user_std()
Duaccess_mvcos.c34 unsigned long tmp1, tmp2; in copy_from_user_mvcos() local
65 : "+a" (size), "+a" (ptr), "+a" (x), "+a" (tmp1), "=a" (tmp2) in copy_from_user_mvcos()
80 unsigned long tmp1, tmp2; in copy_to_user_mvcos() local
101 : "+a" (size), "+a" (ptr), "+a" (x), "+a" (tmp1), "=a" (tmp2) in copy_to_user_mvcos()
118 unsigned long tmp1, tmp2; in copy_in_user_mvcos() local
132 : "+a" (size), "+a" (to), "+a" (from), "+a" (tmp1), "=a" (tmp2) in copy_in_user_mvcos()
140 unsigned long tmp1, tmp2; in clear_user_mvcos() local
160 : "+a" (size), "+a" (to), "+a" (tmp1), "=a" (tmp2) in clear_user_mvcos()
/arch/ia64/lib/
Ddo_csum.S105 #define tmp2 r27 macro
148 adds tmp2=-1,tmp1 // last-1
152 and last=-8,tmp2 // address of word containing last byte
161 shl tmp2=firstoff,3 // number of bits
168 shl hmask=hmask,tmp2 // build head mask, mask off [0,first1off[
263 shr.u tmp2=result1[0],32
265 add result1[0]=tmp1,tmp2
268 shr.u tmp2=result1[0],16
270 add result1[0]=tmp1,tmp2
273 shr.u tmp2=result1[0],16
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/arch/alpha/kernel/
Dtraps.c457 long error, tmp1, tmp2, tmp3, tmp4; in do_entUna() local
484 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) in do_entUna()
488 una_reg(reg) = tmp1|tmp2; in do_entUna()
504 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) in do_entUna()
508 una_reg(reg) = (int)(tmp1|tmp2); in do_entUna()
524 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) in do_entUna()
528 una_reg(reg) = tmp1|tmp2; in do_entUna()
557 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2), in do_entUna()
587 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2), in do_entUna()
617 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2), in do_entUna()
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/arch/blackfin/include/asm/
Dtimex.h18 unsigned long tmp, tmp2; in get_cycles() local
19 __asm__ __volatile__("%0 = cycles; %1 = cycles2;" : "=d"(tmp), "=d"(tmp2)); in get_cycles()
20 return tmp | ((cycles_t)tmp2 << 32); in get_cycles()
/arch/mips/mm/
Dsc-ip22.c89 unsigned long addr, tmp1, tmp2; in indy_sc_enable() local
115 : "=r" (tmp1), "=r" (tmp2), "=r" (addr)); in indy_sc_enable()
120 unsigned long tmp1, tmp2, tmp3; in indy_sc_disable() local
145 : "=r" (tmp1), "=r" (tmp2), "=r" (tmp3)); in indy_sc_disable()
/arch/alpha/lib/
Ddivide.S57 #define tmp2 $4 macro
111 DIV_ONLY(stq tmp2,32($30))
137 2: DIV_ONLY(addq quotient,mask,tmp2)
141 DIV_ONLY(cmovne compare,tmp2,quotient)
150 DIV_ONLY(ldq tmp2,32($30))
Dev6-divide.S67 #define tmp2 $4 macro
123 DIV_ONLY(stq tmp2,32($30)) # L : L U U L
165 DIV_ONLY(addq quotient,mask,tmp2) # E :
174 DIV_ONLY(cmovne compare,tmp2,quotient) # E : Latency 2, extra map slot
201 DIV_ONLY(ldq tmp2,32($30)) # L :
/arch/x86/kernel/cpu/cpufreq/
Dgx-suspmod.c331 u8 tmp1, tmp2; in cpufreq_gx_verify() local
345 tmp_freq = gx_validate_speed(policy->min, &tmp1, &tmp2); in cpufreq_gx_verify()
351 tmp_freq = gx_validate_speed(policy->max, &tmp1, &tmp2); in cpufreq_gx_verify()
370 u8 tmp1, tmp2; in cpufreq_gx_target() local
378 tmp_freq = gx_validate_speed(target_freq, &tmp1, &tmp2); in cpufreq_gx_target()
381 tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2); in cpufreq_gx_target()
385 tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2); in cpufreq_gx_target()
/arch/sh/lib/
Dio.c25 int tmp2, tmp3, tmp4, tmp5, tmp6; in __raw_readsl() local
55 "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4), in __raw_readsl()
/arch/sh/boards/mach-migor/
Dlcd_qvga.c45 unsigned long tmp1, tmp2; in adjust_reg18() local
48 tmp2 = (data<<2 | 0x00000200) & 0x0003FE00; in adjust_reg18()
49 return tmp1 | tmp2; in adjust_reg18()
/arch/arm/mach-iop32x/include/mach/
Dentry-macro.S31 .macro arch_ret_to_user, tmp1, tmp2 argument
33 ands \tmp2, \tmp1, #(1 << 6)
/arch/arm/mach-iop13xx/include/mach/
Dentry-macro.S40 .macro arch_ret_to_user, tmp1, tmp2 argument
42 ands \tmp2, \tmp1, #(1 << 6)
/arch/arm/mach-iop33x/include/mach/
Dentry-macro.S32 .macro arch_ret_to_user, tmp1, tmp2 argument
34 ands \tmp2, \tmp1, #(1 << 6)
/arch/mips/include/asm/
Dspinlock.h179 int tmp, tmp2, tmp3; in __raw_spin_trylock() local
203 [my_ticket] "=&r" (tmp2), in __raw_spin_trylock()
229 [my_ticket] "=&r" (tmp2), in __raw_spin_trylock()
/arch/sparc/math-emu/
Dsfp-util_64.h44 UDItype tmp1, tmp2, tmp3, tmp4; \
69 "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4) \
/arch/arm/plat-omap/include/mach/
Dentry-macro.S36 .macro arch_ret_to_user, tmp1, tmp2 argument
77 .macro arch_ret_to_user, tmp1, tmp2 argument
/arch/arm/mach-rpc/include/mach/
Dentry-macro.S14 .macro arch_ret_to_user, tmp1, tmp2 argument

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