/arch/arm/mach-footbridge/include/mach/ |
D | entry-macro.S | 34 tst \irqstat, #IRQ_MASK_SDRAMPARITY 37 tst \irqstat, #IRQ_MASK_UART_RX 41 tst \irqstat, #IRQ_MASK_DMA1 45 tst \irqstat, #IRQ_MASK_DMA2 49 tst \irqstat, #IRQ_MASK_IN0 53 tst \irqstat, #IRQ_MASK_IN1 57 tst \irqstat, #IRQ_MASK_IN2 61 tst \irqstat, #IRQ_MASK_IN3 65 tst \irqstat, #IRQ_MASK_PCI 69 tst \irqstat, #IRQ_MASK_DOORBELLHOST [all …]
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/arch/sh/lib/ |
D | strlen.S | 15 tst r0,r0 26 tst r1,r1 31 tst r1,r1 36 tst r1,r1 55 tst r0,r0 60 tst r0,r0 65 tst r0,r0
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/arch/arm/lib/ |
D | csumpartial.S | 41 tst buf, #1 @ odd address? 47 .Lless4: tst len, #6 67 tst len, #6 70 .Lless8_byte: tst len, #1 @ odd number of bytes 76 tst td0, #1 @ check buffer alignment 80 .Lnot_aligned: tst buf, #1 @ odd address 85 tst buf, #2 @ 32-bit aligned? 107 tst buf, #1 111 tst buf, #3 @ Test destination alignment 133 3: tst len, #0x1c @ should not change C [all …]
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D | csumpartialcopygeneric.S | 35 tst dst, #1 42 tst dst, #2 61 tst dst, #1 @ dst 16-bit aligned 69 tst len, #6 79 tst len, #6 82 tst len, #1 96 tst dst, #3 @ Test destination alignment 105 tst src, #3 @ Test source alignment 125 tst ip, #8 131 tst ip, #4 [all …]
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D | memset.S | 63 tst r2, #32 66 tst r2, #16 95 tst ip, #(1 << 30) 105 tst r2, #32 107 tst r2, #16 113 4: tst r2, #8 115 tst r2, #4 121 5: tst r2, #2 124 tst r2, #1
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D | memzero.S | 63 tst r1, #32 @ 1 66 tst r1, #16 @ 1 16 bytes or more? 103 tst r1, #32 105 tst r1, #16 111 4: tst r1, #8 @ 1 8 bytes or more? 113 tst r1, #4 @ 1 4 bytes or more? 119 5: tst r1, #2 @ 1 2 bytes or more? 122 tst r1, #1 @ 1 a byte left over
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D | io-readsw-armv3.S | 22 .Linsw_align: tst r1, #1 36 tst r1, #3 71 tst r2, #7 74 .Lno_insw_8: tst r2, #4 89 .Lno_insw_4: tst r2, #2 99 .Lno_insw_2: tst r2, #1
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/arch/arm/mach-h720x/include/mach/ |
D | entry-macro.S | 42 tst \irqstat, \tmp 45 tst \irqstat, #255 48 tst \irqstat, #15 51 tst \irqstat, #3 54 tst \irqstat, #1 57 tst \irqstat, #1 @ bit 0 should be set
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D | debug-macro.S | 19 tst \rx, #1 @ MMU enabled? 32 tst \rd, #1 << 5 @ UARTFLGUTXFF - 1 when full 38 tst \rd, #1 << 3 @ UARTFLGUBUSY - 1 when busy
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/arch/arm/mach-ebsa110/include/mach/ |
D | entry-macro.S | 28 tst \stat, #15 31 tst \stat, #3 34 tst \stat, #1 37 tst \stat, #1 @ bit 0 should be set
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/arch/arm/mm/ |
D | abort-macro.S | 13 tst r3, #PSR_T_BIT 19 tst r3, #1 << 11 @ L = 0 -> write 33 tst r3, #0x0e000000 @ [27:25] == 0 38 tst r3, #1 << 20 @ [20] == 0
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D | proc-macros.S | 139 tst r1, #L_PTE_WRITE 143 tst r1, #L_PTE_USER 148 tst r1, #L_PTE_EXEC 153 tst r1, #L_PTE_YOUNG 185 tst r3, #L_PTE_USER @ user? 188 tst r3, #L_PTE_WRITE | L_PTE_DIRTY @ write and dirty? 191 tst r3, #L_PTE_PRESENT | L_PTE_YOUNG @ present and young? 196 tst r2, #PTE_CACHEABLE 227 tst r3, #L_PTE_USER @ user? 230 tst r3, #L_PTE_WRITE | L_PTE_DIRTY @ write and dirty? [all …]
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D | abort-lv4t.S | 21 tst r3, #PSR_T_BIT @ check for thumb mode 32 tst r8, #1 << 20 @ L = 1 -> write? 62 tst r8, #1 << 21 @ check writeback bit 78 tst r8, #1 << 23 @ Check U bit 85 tst r8, #1 << 21 @ Check writeback bit 89 tst r8, #1 << 22 @ if (immediate offset) 96 tst r8, #1 << 23 @ Check U bit 103 tst r8, #1 << 21 @ check writeback bit 110 tst r8, #1 << 23 @ Check U bit 117 tst r8, #1 << 21 @ check writeback bit [all …]
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/arch/arm/mach-clps711x/include/mach/ |
D | entry-macro.S | 43 1001: tst \stat, #255 46 tst \stat, #15 49 tst \stat, #3 52 tst \stat, #1 55 tst \stat, #1 @ bit 0 should be set
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D | debug-macro.S | 18 tst \rx, #1 @ MMU enabled? 34 tst \rd, #1 << 11 @ UBUSYx 39 tst \rx, #0x1000 @ UART2 does not have CTS here 42 tst \rd, #1 << 8 @ CTS
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/arch/arm/plat-s3c/include/plat/ |
D | debug-macro.S | 28 tst \rd, #S3C2440_UFSTAT_TXFULL 41 tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled? 52 tst \rd, #S3C2410_UTRSTAT_TXFE 60 tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled? 71 tst \rd, #S3C2410_UTRSTAT_TXFE
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/arch/arm/mach-s3c2410/include/mach/ |
D | entry-macro.S | 42 tst \irqstat, \tmp, lsl \irqnr 55 tst \irqstat, #0xff 58 tst \irqstat, #0xf 61 tst \irqstat, #0x3 64 tst \irqstat, #0x1
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/arch/arm/mach-ks8695/include/mach/ |
D | entry-macro.S | 35 tst \irqstat, #0xff 44 tst \irqstat, #0x0f 47 tst \irqstat, #0x03 50 tst \irqstat, #0x01
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/arch/arm/kernel/ |
D | relocate_kernel.S | 18 tst r3,#1,0 24 tst r3,#2,0 31 tst r3,#4,0 37 tst r3,#8,0
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/arch/arm/mach-sa1100/include/mach/ |
D | entry-macro.S | 28 tst \irqstat, #0xff 37 tst \irqstat, #0x0f 40 tst \irqstat, #0x03 43 tst \irqstat, #0x01
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D | debug-macro.S | 17 tst \rx, #1 @ MMU enabled? 28 tst r1, #UTCR3_TXE 50 tst \rd, #UTSR1_TNF 56 tst \rd, #UTSR1_TBY
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/arch/arm/mach-aaec2000/include/mach/ |
D | debug-macro.S | 15 tst \rx, #1 @ MMU enabled? 27 tst \rd, #(1 << 7) 34 tst \rd, #(1 << 5)
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/arch/arm/mach-netx/include/mach/ |
D | debug-macro.S | 18 tst \rx, #1 @ MMU enabled? 30 tst \rd, #(1 << 3) 36 tst \rd, #(1 << 3)
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/arch/m68k/ifpsp060/src/ |
D | itest.S | 53 tst.l %d0 185 tst.b %d0 209 tst.b %d0 231 tst.b %d0 255 tst.b %d0 279 tst.b %d0 303 tst.b %d0 327 tst.b %d0 351 tst.b %d0 375 tst.b %d0 [all …]
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/arch/sh/kernel/ |
D | relocate_kernel.S | 40 tst #1,r0 46 tst #2,r0 52 tst #4,r0 58 tst #8,r0
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