Home
last modified time | relevance | path

Searched refs:value (Results 1 – 25 of 614) sorted by relevance

12345678910>>...25

/arch/arm/plat-omap/include/mach/
Dmcbsp.h154 #define RINTM(value) ((value)<<4) /* bits 4:5 */ argument
157 #define CLKSTP(value) ((value)<<11) /* bits 11:12 */ argument
158 #define RJUST(value) ((value)<<13) /* bits 13:14 */ argument
167 #define XINTM(value) ((value)<<4) /* bits 4:5 */ argument
191 #define RWDLEN1(value) ((value)<<5) /* Bits 5:7 */ argument
192 #define RFRLEN1(value) ((value)<<8) /* Bits 8:14 */ argument
195 #define XWDLEN1(value) ((value)<<5) /* Bits 5:7 */ argument
196 #define XFRLEN1(value) ((value)<<8) /* Bits 8:14 */ argument
199 #define RDATDLY(value) (value) /* Bits 0:1 */ argument
201 #define RCOMPAND(value) ((value)<<3) /* Bits 3:4 */ argument
[all …]
/arch/avr32/mach-at32ap/
Dhmatrix.c16 static inline void __hmatrix_write_reg(unsigned long offset, u32 value) in __hmatrix_write_reg() argument
18 __raw_writel(value, (void __iomem __force *)(HMATRIX_BASE + offset)); in __hmatrix_write_reg()
31 void hmatrix_write_reg(unsigned long offset, u32 value) in hmatrix_write_reg() argument
34 __hmatrix_write_reg(offset, value); in hmatrix_write_reg()
47 u32 value; in hmatrix_read_reg() local
50 value = __hmatrix_read_reg(offset); in hmatrix_read_reg()
53 return value; in hmatrix_read_reg()
63 u32 value; in hmatrix_sfr_set_bits() local
66 value = __hmatrix_read_reg(HMATRIX_SFR(slave_id)); in hmatrix_sfr_set_bits()
67 value |= mask; in hmatrix_sfr_set_bits()
[all …]
/arch/alpha/kernel/
Dmodule.c192 unsigned long value, hi, lo; in apply_relocate_add() local
201 value = sym->st_value + rela[i].r_addend; in apply_relocate_add()
208 ((u32 *)location)[0] = value; in apply_relocate_add()
209 ((u32 *)location)[1] = value >> 32; in apply_relocate_add()
212 value -= gp; in apply_relocate_add()
213 if ((int)value != value) in apply_relocate_add()
215 *(u32 *)location = value; in apply_relocate_add()
223 *(u64 *)hi = value; in apply_relocate_add()
228 value = gp - (u64)location; in apply_relocate_add()
229 lo = (short)value; in apply_relocate_add()
[all …]
/arch/xtensa/kernel/
Dmodule.c93 uint32_t value; in apply_relocate_add() local
104 value = sym->st_value + rela[i].r_addend; in apply_relocate_add()
116 *(uint32_t *)location += value; in apply_relocate_add()
121 value -= ((unsigned long)location & -4) + 4; in apply_relocate_add()
122 if ((value & 3) != 0 || in apply_relocate_add()
123 ((value + (1 << 19)) >> 20) != 0) { in apply_relocate_add()
131 value = (signed int)value >> 2; in apply_relocate_add()
134 ((value >> 16) & 0x3)); in apply_relocate_add()
135 location[1] = (value >> 8) & 0xff; in apply_relocate_add()
136 location[2] = value & 0xff; in apply_relocate_add()
[all …]
/arch/sh/boards/mach-snapgear/
Dio.c85 void snapgear_outb(unsigned char value, unsigned long port) in snapgear_outb() argument
89 *(volatile unsigned char *)port = value; in snapgear_outb()
91 *((unsigned char*)pci_ioaddr(port)) = value; in snapgear_outb()
93 *(port2adr(port)) = value; in snapgear_outb()
96 void snapgear_outb_p(unsigned char value, unsigned long port) in snapgear_outb_p() argument
99 *(volatile unsigned char *)port = value; in snapgear_outb_p()
101 *((unsigned char*)pci_ioaddr(port)) = value; in snapgear_outb_p()
103 *(port2adr(port)) = value; in snapgear_outb_p()
107 void snapgear_outw(unsigned short value, unsigned long port) in snapgear_outw() argument
110 *(volatile unsigned short *)port = value; in snapgear_outw()
[all …]
/arch/sh/boards/mach-se/7751/
Dio.c83 void sh7751se_outb(unsigned char value, unsigned long port) in sh7751se_outb() argument
87 *(volatile unsigned char *)port = value; in sh7751se_outb()
89 *((unsigned char*)pci_ioaddr(port)) = value; in sh7751se_outb()
91 *(port2adr(port)) = value; in sh7751se_outb()
94 void sh7751se_outb_p(unsigned char value, unsigned long port) in sh7751se_outb_p() argument
97 *(volatile unsigned char *)port = value; in sh7751se_outb_p()
99 *((unsigned char*)pci_ioaddr(port)) = value; in sh7751se_outb_p()
101 *(port2adr(port)) = value; in sh7751se_outb_p()
105 void sh7751se_outw(unsigned short value, unsigned long port) in sh7751se_outw() argument
108 *(volatile unsigned short *)port = value; in sh7751se_outw()
[all …]
/arch/m32r/kernel/
Dmodule.c111 uint32_t value; in apply_relocate_add() local
132 COPY_UNALIGNED_WORD (*location, value, align); in apply_relocate_add()
133 value += relocation; in apply_relocate_add()
134 COPY_UNALIGNED_WORD (value, *location, align); in apply_relocate_add()
137 COPY_UNALIGNED_WORD (*location, value, align); in apply_relocate_add()
140 value += relocation; in apply_relocate_add()
141 COPY_UNALIGNED_WORD (value, *location, align); in apply_relocate_add()
144 COPY_UNALIGNED_WORD (*location, value, align); in apply_relocate_add()
148 value += relocation; in apply_relocate_add()
149 COPY_UNALIGNED_WORD (value, *location, align); in apply_relocate_add()
[all …]
/arch/arm/mach-ep93xx/
Dclock.c63 u32 value; in clk_enable() local
65 value = __raw_readl(clk->enable_reg); in clk_enable()
66 __raw_writel(value | clk->enable_mask, clk->enable_reg); in clk_enable()
76 u32 value; in clk_disable() local
78 value = __raw_readl(clk->enable_reg); in clk_disable()
79 __raw_writel(value & ~clk->enable_mask, clk->enable_reg); in clk_disable()
115 u32 value; in ep93xx_clock_init() local
118 value = __raw_readl(EP93XX_SYSCON_CLOCK_SET1); in ep93xx_clock_init()
119 if (!(value & 0x00800000)) { /* PLL1 bypassed? */ in ep93xx_clock_init()
122 clk_pll1.rate = calc_pll_rate(value); in ep93xx_clock_init()
[all …]
/arch/sh/boards/mach-systemh/
Dio.c92 void sh7751systemh_outb(unsigned char value, unsigned long port) in sh7751systemh_outb() argument
96 *(volatile unsigned char *)port = value; in sh7751systemh_outb()
98 *((unsigned char*)pci_ioaddr(port)) = value; in sh7751systemh_outb()
100 *(volatile unsigned char *)ETHER_IOMAP(port) = value; in sh7751systemh_outb()
102 *(port2adr(port)) = value; in sh7751systemh_outb()
105 void sh7751systemh_outb_p(unsigned char value, unsigned long port) in sh7751systemh_outb_p() argument
108 *(volatile unsigned char *)port = value; in sh7751systemh_outb_p()
110 *((unsigned char*)pci_ioaddr(port)) = value; in sh7751systemh_outb_p()
112 *(volatile unsigned char *)ETHER_IOMAP(port) = value; in sh7751systemh_outb_p()
114 *(port2adr(port)) = value; in sh7751systemh_outb_p()
[all …]
/arch/mips/alchemy/common/
Dgpio.c47 static void au1xxx_gpio2_write(unsigned gpio, int value) in au1xxx_gpio2_write() argument
51 gpio2->output = (GPIO2_OUTPUT_ENABLE_MASK << gpio) | ((!!value) << gpio); in au1xxx_gpio2_write()
61 static int au1xxx_gpio2_direction_output(unsigned gpio, int value) in au1xxx_gpio2_direction_output() argument
65 gpio2->output = (GPIO2_OUTPUT_ENABLE_MASK << gpio) | ((!!value) << gpio); in au1xxx_gpio2_direction_output()
76 static void au1xxx_gpio1_write(unsigned gpio, int value) in au1xxx_gpio1_write() argument
78 if (value) in au1xxx_gpio1_write()
91 static int au1xxx_gpio1_direction_output(unsigned gpio, int value) in au1xxx_gpio1_direction_output() argument
94 au1xxx_gpio1_write(gpio, value); in au1xxx_gpio1_direction_output()
111 void au1xxx_gpio_set_value(unsigned gpio, int value) in au1xxx_gpio_set_value() argument
117 au1xxx_gpio2_write(gpio, value); in au1xxx_gpio_set_value()
[all …]
/arch/powerpc/xmon/
Dppc-dis.c99 long value; in print_insn_powerpc() local
111 value = (*operand->extract) (insn, dialect, &invalid); in print_insn_powerpc()
114 value = (insn >> operand->shift) & ((1 << operand->bits) - 1); in print_insn_powerpc()
116 && (value & (1 << (operand->bits - 1))) != 0) in print_insn_powerpc()
117 value -= 1 << operand->bits; in print_insn_powerpc()
124 && value == 0) in print_insn_powerpc()
135 || ((operand->flags & PPC_OPERAND_GPR_0) != 0 && value != 0)) in print_insn_powerpc()
136 printf("r%ld", value); in print_insn_powerpc()
138 printf("f%ld", value); in print_insn_powerpc()
140 printf("v%ld", value); in print_insn_powerpc()
[all …]
/arch/sh/boards/mach-titan/
Dio.c65 void titan_outb(u8 value, unsigned long port) in titan_outb() argument
68 ctrl_outb(value, port); in titan_outb()
70 ctrl_outb(value, pci_ioaddr(port)); in titan_outb()
72 ctrl_outw(value, port2adr(port)); in titan_outb()
75 void titan_outb_p(u8 value, unsigned long port) in titan_outb_p() argument
78 ctrl_outb(value, port); in titan_outb_p()
80 ctrl_outb(value, pci_ioaddr(port)); in titan_outb_p()
82 ctrl_outw(value, port2adr(port)); in titan_outb_p()
86 void titan_outw(u16 value, unsigned long port) in titan_outw() argument
89 ctrl_outw(value, port); in titan_outw()
[all …]
/arch/arm/mach-imx/include/mach/
Dgpio.h21 extern int imx_gpio_direction_output(unsigned gpio, int value);
23 extern void __imx_gpio_set_value(unsigned gpio, int value);
30 static inline void imx_gpio_set_value_inline(unsigned gpio, int value) in imx_gpio_set_value_inline() argument
35 if(value) in imx_gpio_set_value_inline()
42 static inline void imx_gpio_set_value(unsigned gpio, int value) in imx_gpio_set_value() argument
45 imx_gpio_set_value_inline(gpio, value); in imx_gpio_set_value()
47 __imx_gpio_set_value(gpio, value); in imx_gpio_set_value()
77 static inline int gpio_direction_output(unsigned gpio, int value) in gpio_direction_output() argument
79 return imx_gpio_direction_output(gpio, value); in gpio_direction_output()
87 static inline void gpio_set_value(unsigned gpio, int value) in gpio_set_value() argument
[all …]
/arch/s390/include/asm/
Dcputime.h105 timespec_to_cputime(const struct timespec *value) in timespec_to_cputime() argument
107 return value->tv_nsec * 4096 / 1000 + (u64) value->tv_sec * 4096000000ULL; in timespec_to_cputime()
111 cputime_to_timespec(const cputime_t cputime, struct timespec *value) in cputime_to_timespec() argument
118 value->tv_nsec = rp.subreg.even * 1000 / 4096; in cputime_to_timespec()
119 value->tv_sec = rp.subreg.odd; in cputime_to_timespec()
121 value->tv_nsec = (cputime % 4096000000ULL) * 1000 / 4096; in cputime_to_timespec()
122 value->tv_sec = cputime / 4096000000ULL; in cputime_to_timespec()
132 timeval_to_cputime(const struct timeval *value) in timeval_to_cputime() argument
134 return value->tv_usec * 4096 + (u64) value->tv_sec * 4096000000ULL; in timeval_to_cputime()
138 cputime_to_timeval(const cputime_t cputime, struct timeval *value) in cputime_to_timeval() argument
[all …]
/arch/parisc/math-emu/
Dfloat.h87 #define Deposit_ssign(object,value) Bitfield_deposit(value,0,1,object) argument
88 #define Deposit_sexponent(object,value) Bitfield_deposit(value,1,8,object) argument
89 #define Deposit_smantissa(object,value) Bitfield_deposit(value,9,23,object) argument
90 #define Deposit_shigh2mantissa(object,value) Bitfield_deposit(value,9,2,object) argument
91 #define Deposit_sexponentmantissa(object,value) \ argument
92 Bitfield_deposit(value,1,31,object)
93 #define Deposit_ssignexponent(object,value) Bitfield_deposit(value,0,9,object) argument
94 #define Deposit_slow(object,value) Bitfield_deposit(value,31,1,object) argument
95 #define Deposit_shigh4(object,value) Bitfield_deposit(value,0,4,object) argument
140 #define Deposit_dsign(object,value) Bitfield_deposit(value,0,1,object) argument
[all …]
/arch/mips/pci/
Dops-bridge.c44 int where, int size, u32 * value) in pci_conf0_read_config() argument
68 res = get_dbe(*value, (u8 *) addr); in pci_conf0_read_config()
70 res = get_dbe(*value, (u16 *) addr); in pci_conf0_read_config()
72 res = get_dbe(*value, (u32 *) addr); in pci_conf0_read_config()
83 *value = emulate_ioc3_cfg(where, size); in pci_conf0_read_config()
98 *value = (cf >> shift) & mask; in pci_conf0_read_config()
104 int where, int size, u32 * value) in pci_conf1_read_config() argument
131 res = get_dbe(*value, (u8 *) addr); in pci_conf1_read_config()
133 res = get_dbe(*value, (u16 *) addr); in pci_conf1_read_config()
135 res = get_dbe(*value, (u32 *) addr); in pci_conf1_read_config()
[all …]
/arch/m68k/include/asm/
Dmovs.h38 #define SET_CONTROL_BYTE(addr,value) \ argument
39 __asm__ __volatile__ (" movsb %0, %1@" : : "d" (value), "a" (addr));
43 #define GET_CONTROL_BYTE(addr,value) \ argument
44 __asm__ __volatile__ (" movsb %1@, %0" : "=d" (value) : "a" (addr));
48 #define SET_CONTROL_WORD(addr,value) \ argument
49 __asm__ __volatile__ (" movsl %0, %1@" : : "d" (value), "a" (addr));
53 #define GET_CONTROL_WORD(addr,value) \ argument
54 __asm__ __volatile__ (" movsl %1@, %0" : "=d" (value) : "a" (addr));
/arch/mips/gt64120/wrppmc/
Dsetup.c37 unsigned char value = *wrppmc_led; in wrppmc_led_on() local
39 value &= (0xF8 | mask); in wrppmc_led_on()
40 *wrppmc_led = value; in wrppmc_led_on()
46 unsigned char value = *wrppmc_led; in wrppmc_led_off() local
48 value |= (0x7 & mask); in wrppmc_led_off()
49 *wrppmc_led = value; in wrppmc_led_off()
59 unsigned char value; in wrppmc_early_putc() local
63 value = *(wrppmc_uart + 5); in wrppmc_early_putc()
64 if (value & 0x20) in wrppmc_early_putc()
/arch/arm/mach-ns9xxx/include/mach/
Dhardware.h32 #define __REGVAL(mask, value) (((value) * __REGSHIFT(mask)) & (mask)) argument
39 # define __REGSET(var, field, value) \ argument
40 ((var) = (((var) & ~((field) & ~(value))) | (value)))
42 # define REGSET(var, reg, field, value) \ argument
43 __REGSET(var, reg ## _ ## field, reg ## _ ## field ## _ ## value)
45 # define REGSET_IDX(var, reg, field, idx, value) \ argument
46 __REGSET(var, reg ## _ ## field((idx)), reg ## _ ## field ## _ ## value((idx)))
48 # define REGSETIM(var, reg, field, value) \ argument
49 __REGSET(var, reg ## _ ## field, __REGVAL(reg ## _ ## field, (value)))
51 # define REGSETIM_IDX(var, reg, field, idx, value) \ argument
[all …]
/arch/x86/include/asm/
Dio_32.h215 static inline void out##bwl(unsigned type value, int port) \
217 out##bwl##_local(value, port); \
226 static inline void out##bwl##_local(unsigned type value, int port) \
229 : : "a"(value), "Nd"(port)); \
234 unsigned type value; \
236 : "=a"(value) : "Nd"(port)); \
237 return value; \
240 static inline void out##bwl##_local_p(unsigned type value, int port) \
242 out##bwl##_local(value, port); \
248 unsigned type value = in##bwl##_local(port); \
[all …]
/arch/arm/mach-rpc/include/mach/
Dio.h32 static inline void __outb (unsigned int value, unsigned int port) in __outb() argument
41 : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) in __outb()
45 static inline void __outw (unsigned int value, unsigned int port) in __outw() argument
54 : "r" (value|value<<16), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) in __outw()
58 static inline void __outl (unsigned int value, unsigned int port) in __outl() argument
67 : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) in __outl()
74 unsigned long temp, value; \
80 : "=&r" (temp), "=r" (value) \
83 return (unsigned sz)value; \
112 #define __outbc(value,port) \ argument
[all …]
/arch/x86/pci/
Ddirect.c21 unsigned int devfn, int reg, int len, u32 *value) in pci_conf1_read() argument
26 *value = -1; in pci_conf1_read()
36 *value = inb(0xCFC + (reg & 3)); in pci_conf1_read()
39 *value = inw(0xCFC + (reg & 2)); in pci_conf1_read()
42 *value = inl(0xCFC); in pci_conf1_read()
52 unsigned int devfn, int reg, int len, u32 value) in pci_conf1_write() argument
65 outb((u8)value, 0xCFC + (reg & 3)); in pci_conf1_write()
68 outw((u16)value, 0xCFC + (reg & 2)); in pci_conf1_write()
71 outl((u32)value, 0xCFC); in pci_conf1_write()
95 unsigned int devfn, int reg, int len, u32 *value) in pci_conf2_read() argument
[all …]
Dnumaq_32.c40 unsigned int devfn, int reg, int len, u32 *value) in pci_conf1_mq_read() argument
45 if (!value || (bus >= MAX_MP_BUSSES) || (devfn > 255) || (reg > 255)) in pci_conf1_mq_read()
55 *value = readb(adr + (reg & 3)); in pci_conf1_mq_read()
57 *value = inb(0xCFC + (reg & 3)); in pci_conf1_mq_read()
61 *value = readw(adr + (reg & 2)); in pci_conf1_mq_read()
63 *value = inw(0xCFC + (reg & 2)); in pci_conf1_mq_read()
67 *value = readl(adr); in pci_conf1_mq_read()
69 *value = inl(0xCFC); in pci_conf1_mq_read()
79 unsigned int devfn, int reg, int len, u32 value) in pci_conf1_mq_write() argument
94 writeb(value, adr + (reg & 3)); in pci_conf1_mq_write()
[all …]
/arch/sparc/kernel/
Dpci_common.c54 int where, int size, u32 *value) in sun4u_read_pci_cfg_host() argument
72 *value = tmp16 >> 8; in sun4u_read_pci_cfg_host()
74 *value = tmp16 & 0xff; in sun4u_read_pci_cfg_host()
77 *value = (u32) tmp8; in sun4u_read_pci_cfg_host()
84 *value = (u32) tmp16; in sun4u_read_pci_cfg_host()
87 *value = (u32) tmp8; in sun4u_read_pci_cfg_host()
89 *value |= ((u32) tmp8) << 8; in sun4u_read_pci_cfg_host()
97 *value = tmp32; in sun4u_read_pci_cfg_host()
102 *value |= tmp32 << 16; in sun4u_read_pci_cfg_host()
109 int where, int size, u32 *value) in sun4u_read_pci_cfg() argument
[all …]
/arch/mips/include/asm/mach-bcm47xx/
Dgpio.h27 static inline void gpio_set_value(unsigned gpio, int value) in gpio_set_value() argument
29 ssb_gpio_out(&ssb_bcm47xx, 1 << gpio, value ? 1 << gpio : 0); in gpio_set_value()
37 static inline int gpio_direction_output(unsigned gpio, int value) in gpio_direction_output() argument
42 static int gpio_intmask(unsigned gpio, int value) in gpio_intmask() argument
45 value ? 1 << gpio : 0); in gpio_intmask()
48 static int gpio_polarity(unsigned gpio, int value) in gpio_polarity() argument
51 value ? 1 << gpio : 0); in gpio_polarity()

12345678910>>...25