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Searched refs:write_c0_cache (Results 1 – 2 of 2) sorted by relevance

/arch/mips/txx9/jmr3927/
Dsetup.c93 write_c0_cache(0); in jmr3927_mem_setup()
/arch/mips/include/asm/
Dmipsregs.h796 #define write_c0_cache(val) __write_32bit_c0_register($7, 0, val) macro