Home
last modified time | relevance | path

Searched refs:write_c0_hwrena (Results 1 – 2 of 2) sorted by relevance

/arch/mips/kernel/
Dtraps.c1511 write_c0_hwrena(enable); in per_cpu_trap_init()
1515 write_c0_hwrena(0xc000000f); /* Octeon has register 30 and 31 */ in per_cpu_trap_init()
/arch/mips/include/asm/
Dmipsregs.h989 #define write_c0_hwrena(val) __write_32bit_c0_register($7, 0, val) macro