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/arch/mips/include/asm/sibyte/
Dsb1250_genbus.h53 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \
58 #define V_IO_WIDTH_SEL(x) _SB_MAKEVALUE(x, S_IO_WIDTH_SEL) argument
59 #define G_IO_WIDTH_SEL(x) _SB_GETVALUE(x, S_IO_WIDTH_SEL, M_IO_WIDTH_SEL) argument
63 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \
75 #define V_IO_TIMEOUT(x) _SB_MAKEVALUE(x, S_IO_TIMEOUT) argument
76 #define G_IO_TIMEOUT(x) _SB_GETVALUE(x, S_IO_TIMEOUT, M_IO_TIMEOUT) argument
84 #define V_IO_MULT_SIZE(x) _SB_MAKEVALUE(x, S_IO_MULT_SIZE) argument
85 #define G_IO_MULT_SIZE(x) _SB_GETVALUE(x, S_IO_MULT_SIZE, M_IO_MULT_SIZE) argument
95 #define V_IO_START_ADDR(x) _SB_MAKEVALUE(x, S_IO_START_ADDR) argument
96 #define G_IO_START_ADDR(x) _SB_GETVALUE(x, S_IO_START_ADDR, M_IO_START_ADDR) argument
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Dbcm1480_mc.h44 #define V_BCM1480_MC_INTLV0(x) _SB_MAKEVALUE(x, S_BCM1480_MC_INTLV0) argument
45 #define G_BCM1480_MC_INTLV0(x) _SB_GETVALUE(x, S_BCM1480_MC_INTLV0, M_BCM1480_MC_INTLV… argument
50 #define V_BCM1480_MC_INTLV1(x) _SB_MAKEVALUE(x, S_BCM1480_MC_INTLV1) argument
51 #define G_BCM1480_MC_INTLV1(x) _SB_GETVALUE(x, S_BCM1480_MC_INTLV1, M_BCM1480_MC_INTLV… argument
56 #define V_BCM1480_MC_INTLV2(x) _SB_MAKEVALUE(x, S_BCM1480_MC_INTLV2) argument
57 #define G_BCM1480_MC_INTLV2(x) _SB_GETVALUE(x, S_BCM1480_MC_INTLV2, M_BCM1480_MC_INTLV… argument
62 #define V_BCM1480_MC_CS_MODE(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS_MODE) argument
63 #define G_BCM1480_MC_CS_MODE(x) _SB_GETVALUE(x, S_BCM1480_MC_CS_MODE, M_BCM1480_MC_CS_M… argument
85 #define V_BCM1480_MC_CS0_START(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS0_START) argument
86 #define G_BCM1480_MC_CS0_START(x) _SB_GETVALUE(x, S_BCM1480_MC_CS0_START, M_BCM1480_MC_CS… argument
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Dsb1250_mc.h47 #define V_MC_CHANNEL_SEL(x) _SB_MAKEVALUE(x, S_MC_CHANNEL_SEL) argument
48 #define G_MC_CHANNEL_SEL(x) _SB_GETVALUE(x, S_MC_CHANNEL_SEL, M_MC_CHANNEL_SEL) argument
52 #define V_MC_BANK0_MAP(x) _SB_MAKEVALUE(x, S_MC_BANK0_MAP) argument
53 #define G_MC_BANK0_MAP(x) _SB_GETVALUE(x, S_MC_BANK0_MAP, M_MC_BANK0_MAP) argument
60 #define V_MC_BANK1_MAP(x) _SB_MAKEVALUE(x, S_MC_BANK1_MAP) argument
61 #define G_MC_BANK1_MAP(x) _SB_GETVALUE(x, S_MC_BANK1_MAP, M_MC_BANK1_MAP) argument
68 #define V_MC_BANK2_MAP(x) _SB_MAKEVALUE(x, S_MC_BANK2_MAP) argument
69 #define G_MC_BANK2_MAP(x) _SB_GETVALUE(x, S_MC_BANK2_MAP, M_MC_BANK2_MAP) argument
76 #define V_MC_BANK3_MAP(x) _SB_MAKEVALUE(x, S_MC_BANK3_MAP) argument
77 #define G_MC_BANK3_MAP(x) _SB_GETVALUE(x, S_MC_BANK3_MAP, M_MC_BANK3_MAP) argument
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Dsb1250_ldt.h71 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
85 #define V_LDT_DEVICEID_VENDOR(x) _SB_MAKEVALUE_32(x, S_LDT_DEVICEID_VENDOR) argument
86 #define G_LDT_DEVICEID_VENDOR(x) _SB_GETVALUE_32(x, S_LDT_DEVICEID_VENDOR, M_LDT_DEVICEID_VENDOR) argument
90 #define V_LDT_DEVICEID_DEVICEID(x) _SB_MAKEVALUE_32(x, S_LDT_DEVICEID_DEVICEID) argument
91 #define G_LDT_DEVICEID_DEVICEID(x) _SB_GETVALUE_32(x, S_LDT_DEVICEID_DEVICEID, M_LDT_DEVICEID_DEVIC… argument
115 #define V_LDT_CLASSREV_REV(x) _SB_MAKEVALUE_32(x, S_LDT_CLASSREV_REV) argument
116 #define G_LDT_CLASSREV_REV(x) _SB_GETVALUE_32(x, S_LDT_CLASSREV_REV, M_LDT_CLASSREV_REV) argument
120 #define V_LDT_CLASSREV_CLASS(x) _SB_MAKEVALUE_32(x, S_LDT_CLASSREV_CLASS) argument
121 #define G_LDT_CLASSREV_CLASS(x) _SB_GETVALUE_32(x, S_LDT_CLASSREV_CLASS, M_LDT_CLASSREV_CLASS) argument
132 #define V_LDT_DEVHDR_CLINESZ(x) _SB_MAKEVALUE_32(x, S_LDT_DEVHDR_CLINESZ) argument
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Dsb1250_scd.h49 #define V_SYS_REVISION(x) _SB_MAKEVALUE(x, S_SYS_REVISION) argument
50 #define G_SYS_REVISION(x) _SB_GETVALUE(x, S_SYS_REVISION, M_SYS_REVISION) argument
98 #define V_SYS_L2C_SIZE(x) _SB_MAKEVALUE(x, S_SYS_L2C_SIZE) argument
99 #define G_SYS_L2C_SIZE(x) _SB_GETVALUE(x, S_SYS_L2C_SIZE, M_SYS_L2C_SIZE) argument
114 #define V_SYS_NUM_CPUS(x) _SB_MAKEVALUE(x, S_SYS_NUM_CPUS) argument
115 #define G_SYS_NUM_CPUS(x) _SB_GETVALUE(x, S_SYS_NUM_CPUS, M_SYS_NUM_CPUS) argument
121 #define V_SYS_PART(x) _SB_MAKEVALUE(x, S_SYS_PART) argument
122 #define G_SYS_PART(x) _SB_GETVALUE(x, S_SYS_PART, M_SYS_PART) argument
135 #define V_SYS_SOC_TYPE(x) _SB_MAKEVALUE(x, S_SYS_SOC_TYPE) argument
136 #define G_SYS_SOC_TYPE(x) _SB_GETVALUE(x, S_SYS_SOC_TYPE, M_SYS_SOC_TYPE) argument
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Dsb1250_mac.h59 #define V_MAC_TX_PAUSE_CNT(x) _SB_MAKEVALUE(x, S_MAC_TX_PAUSE) argument
101 #define V_MAC_SPEED_SEL(x) _SB_MAKEVALUE(x, S_MAC_SPEED_SEL) argument
102 #define G_MAC_SPEED_SEL(x) _SB_GETVALUE(x, S_MAC_SPEED_SEL, M_MAC_SPEED_SEL) argument
121 #define V_MAC_BYPASS_CFG(x) _SB_MAKEVALUE(x, S_MAC_BYPASS_CFG) argument
122 #define G_MAC_BYPASS_CFG(x) _SB_GETVALUE(x, S_MAC_BYPASS_CFG, M_MAC_BYPASS_CFG) argument
132 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1…
136 #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1…
142 #define V_MAC_BYPASS_IFG(x) _SB_MAKEVALUE(x, S_MAC_BYPASS_IFG) argument
143 #define G_MAC_BYPASS_IFG(x) _SB_GETVALUE(x, S_MAC_BYPASS_IFG, M_MAC_BYPASS_IFG) argument
157 #define V_MAC_FC_CMD(x) _SB_MAKEVALUE(x, S_MAC_FC_CMD) argument
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Dbcm1480_l2c.h44 #define V_BCM1480_L2C_MGMT_INDEX(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_MGMT_INDEX) argument
45 #define G_BCM1480_L2C_MGMT_INDEX(x) _SB_GETVALUE(x, S_BCM1480_L2C_MGMT_INDEX, M_BCM1480_L2C… argument
49 #define V_BCM1480_L2C_MGMT_WAY(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_MGMT_WAY) argument
50 #define G_BCM1480_L2C_MGMT_WAY(x) _SB_GETVALUE(x, S_BCM1480_L2C_MGMT_WAY, M_BCM1480_L2C_M… argument
57 #define V_BCM1480_L2C_MGMT_ECC_DIAG(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_MGMT_ECC_DIAG) argument
58 #define G_BCM1480_L2C_MGMT_ECC_DIAG(x) _SB_GETVALUE(x, S_BCM1480_L2C_MGMT_ECC_DIAG, M_BCM1480_… argument
75 #define V_BCM1480_L2C_TAG_INDEX(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_TAG_INDEX) argument
76 #define G_BCM1480_L2C_TAG_INDEX(x) _SB_GETVALUE(x, S_BCM1480_L2C_TAG_INDEX, M_BCM1480_L2C_… argument
81 #define V_BCM1480_L2C_TAG_TAG(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_TAG_TAG) argument
82 #define G_BCM1480_L2C_TAG_TAG(x) _SB_GETVALUE(x, S_BCM1480_L2C_TAG_TAG, M_BCM1480_L2C_TA… argument
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Dsb1250_l2c.h47 #define V_L2C_TAG_INDEX(x) _SB_MAKEVALUE(x, S_L2C_TAG_INDEX) argument
48 #define G_L2C_TAG_INDEX(x) _SB_GETVALUE(x, S_L2C_TAG_INDEX, M_L2C_TAG_INDEX) argument
52 #define V_L2C_TAG_TAG(x) _SB_MAKEVALUE(x, S_L2C_TAG_TAG) argument
53 #define G_L2C_TAG_TAG(x) _SB_GETVALUE(x, S_L2C_TAG_TAG, M_L2C_TAG_TAG) argument
57 #define V_L2C_TAG_ECC(x) _SB_MAKEVALUE(x, S_L2C_TAG_ECC) argument
58 #define G_L2C_TAG_ECC(x) _SB_GETVALUE(x, S_L2C_TAG_ECC, M_L2C_TAG_ECC) argument
62 #define V_L2C_TAG_WAY(x) _SB_MAKEVALUE(x, S_L2C_TAG_WAY) argument
63 #define G_L2C_TAG_WAY(x) _SB_GETVALUE(x, S_L2C_TAG_WAY, M_L2C_TAG_WAY) argument
74 #define V_L2C_MGMT_INDEX(x) _SB_MAKEVALUE(x, S_L2C_MGMT_INDEX) argument
75 #define G_L2C_MGMT_INDEX(x) _SB_GETVALUE(x, S_L2C_MGMT_INDEX, M_L2C_MGMT_INDEX) argument
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Dbcm1480_scd.h103 #define V_BCM1480_SYS_PLL_DIV(x) _SB_MAKEVALUE(x, S_BCM1480_SYS_PLL_DIV) argument
104 #define G_BCM1480_SYS_PLL_DIV(x) _SB_GETVALUE(x, S_BCM1480_SYS_PLL_DIV, M_BCM1480_SYS_PL… argument
108 #define V_BCM1480_SYS_SW_DIV(x) _SB_MAKEVALUE(x, S_BCM1480_SYS_SW_DIV) argument
109 #define G_BCM1480_SYS_SW_DIV(x) _SB_GETVALUE(x, S_BCM1480_SYS_SW_DIV, M_BCM1480_SYS_SW_… argument
116 #define V_BCM1480_SYS_BOOT_MODE(x) _SB_MAKEVALUE(x, S_BCM1480_SYS_BOOT_MODE) argument
117 #define G_BCM1480_SYS_BOOT_MODE(x) _SB_GETVALUE(x, S_BCM1480_SYS_BOOT_MODE, M_BCM1480_SYS_… argument
133 #define V_BCM1480_SYS_CONFIG(x) _SB_MAKEVALUE(x, S_BCM1480_SYS_CONFIG) argument
134 #define G_BCM1480_SYS_CONFIG(x) _SB_GETVALUE(x, S_BCM1480_SYS_CONFIG, M_BCM1480_SYS_CON… argument
140 #define V_BCM1480_SYS_NODEID(x) _SB_MAKEVALUE(x, S_BCM1480_SYS_NODEID) argument
141 #define G_BCM1480_SYS_NODEID(x) _SB_GETVALUE(x, S_BCM1480_SYS_NODEID, M_BCM1480_SYS_NOD… argument
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/arch/m68k/include/asm/
Dm532xsim.h12 #define MCF_REG32(x) (*(volatile unsigned long *)(x)) argument
13 #define MCF_REG16(x) (*(volatile unsigned short *)(x)) argument
14 #define MCF_REG08(x) (*(volatile unsigned char *)(x)) argument
141 #define MCF532x_I2C_I2ADR_ADDR(x) (((x)&0x7F)<<0x01) argument
143 #define MCF532x_I2C_I2FDR_IC(x) (((x)&0x3F)) argument
204 #define MCF_CCM_CCR_BOOTPS(x) (((x)&0x0003)<<3|0x0001) argument
207 #define MCF_CCM_CCR_CSC(x) (((x)&0x0003)<<8|0x0001) argument
213 #define MCF_CCM_RCON_BOOTPS(x) (((x)&0x0003)<<3|0x0001) argument
216 #define MCF_CCM_RCON_CSC(x) (((x)&0x0003)<<8|0x0001) argument
219 #define MCF_CCM_CIR_PRN(x) (((x)&0x003F)<<0) argument
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/arch/arm/mach-s3c2410/include/mach/
Dregs-lcd.h15 #define S3C2410_LCDREG(x) (x) argument
24 #define S3C2410_LCDCON1_CLKVAL(x) ((x) << 8) argument
48 #define S3C2410_LCDCON2_VBPD(x) ((x) << 24) argument
49 #define S3C2410_LCDCON2_LINEVAL(x) ((x) << 14) argument
50 #define S3C2410_LCDCON2_VFPD(x) ((x) << 6) argument
51 #define S3C2410_LCDCON2_VSPW(x) ((x) << 0) argument
53 #define S3C2410_LCDCON2_GET_VBPD(x) ( ((x) >> 24) & 0xFF) argument
54 #define S3C2410_LCDCON2_GET_VFPD(x) ( ((x) >> 6) & 0xFF) argument
55 #define S3C2410_LCDCON2_GET_VSPW(x) ( ((x) >> 0) & 0x3F) argument
57 #define S3C2410_LCDCON3_HBPD(x) ((x) << 19) argument
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/arch/sparc/include/asm/
Dpage_32.h74 #define pte_val(x) ((x).pte) argument
75 #define iopte_val(x) ((x).iopte) argument
76 #define pmd_val(x) ((x).pmdv[0]) argument
77 #define pgd_val(x) ((x).pgd) argument
78 #define ctxd_val(x) ((x).ctxd) argument
79 #define pgprot_val(x) ((x).pgprot) argument
80 #define iopgprot_val(x) ((x).iopgprot) argument
82 #define __pte(x) ((pte_t) { (x) } ) argument
83 #define __iopte(x) ((iopte_t) { (x) } ) argument
85 #define __pgd(x) ((pgd_t) { (x) } ) argument
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Dpage_64.h67 #define pte_val(x) ((x).pte) argument
68 #define iopte_val(x) ((x).iopte) argument
69 #define pmd_val(x) ((x).pmd) argument
70 #define pgd_val(x) ((x).pgd) argument
71 #define pgprot_val(x) ((x).pgprot) argument
73 #define __pte(x) ((pte_t) { (x) } ) argument
74 #define __iopte(x) ((iopte_t) { (x) } ) argument
75 #define __pmd(x) ((pmd_t) { (x) } ) argument
76 #define __pgd(x) ((pgd_t) { (x) } ) argument
77 #define __pgprot(x) ((pgprot_t) { (x) } ) argument
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/arch/cris/include/arch-v10/arch/
Dio.h41 #define CRIS_LED_NETWORK_SET_G(x) argument
42 #define CRIS_LED_NETWORK_SET_R(x) argument
43 #define CRIS_LED_ACTIVE_SET_G(x) argument
44 #define CRIS_LED_ACTIVE_SET_R(x) argument
45 #define CRIS_LED_DISK_WRITE(x) argument
46 #define CRIS_LED_DISK_READ(x) argument
50 #define CRIS_LED_BIT_SET(x) argument
51 #define CRIS_LED_BIT_CLR(x) argument
60 #define CRIS_LED_NETWORK_SET(x) argument
63 #define CRIS_LED_NETWORK_SET(x) \ argument
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/arch/avr32/mach-at32ap/include/mach/
Dio.h10 # define ioswabb(a, x) (x) argument
11 # define ioswabw(a, x) (x) argument
12 # define ioswabl(a, x) (x) argument
13 # define __mem_ioswabb(a, x) (x) argument
14 # define __mem_ioswabw(a, x) swab16(x) argument
15 # define __mem_ioswabl(a, x) swab32(x) argument
20 # define ioswabb(a, x) (x) argument
21 # define ioswabw(a, x) (x) argument
22 # define ioswabl(a, x) swahw32(x) argument
23 # define __mem_ioswabb(a, x) (x) argument
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/arch/ia64/include/asm/sn/
Daddrs.h112 #define NODE_OFFSET(x) ((x) & (NODE_ADDRSPACE_SIZE - 1)) argument
114 #define NASID_GET(x) (int) (((u64) (x) >> NASID_SHIFT) & NASID_BITMASK) argument
119 #define CHANGE_NASID(n,x) ((void *)(((u64)(x) & ~NASID_MASK) | NASID_SPACE(n))) argument
137 #define TO_PHYS(x) (TO_PHYS_MASK & (x)) argument
138 #define TO_CAC(x) (CAC_BASE | TO_PHYS(x)) argument
140 #define TO_AMO(x) (AMO_BASE | TO_PHYS(x)) argument
141 #define TO_GET(x) (GET_BASE | TO_PHYS(x)) argument
143 #define TO_AMO(x) ({ BUG(); x; }) argument
144 #define TO_GET(x) ({ BUG(); x; }) argument
155 #define SH1_TIO_PHYS_TO_DMA(x) \ argument
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/arch/mips/include/asm/mach-generic/
Dmangle-port.h30 # define ioswabb(a, x) (x) argument
31 # define __mem_ioswabb(a, x) (x) argument
32 # define ioswabw(a, x) le16_to_cpu(x) argument
33 # define __mem_ioswabw(a, x) (x) argument
34 # define ioswabl(a, x) le32_to_cpu(x) argument
35 # define __mem_ioswabl(a, x) (x) argument
36 # define ioswabq(a, x) le64_to_cpu(x) argument
37 # define __mem_ioswabq(a, x) (x) argument
41 # define ioswabb(a, x) (x) argument
42 # define __mem_ioswabb(a, x) (x) argument
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/arch/blackfin/include/asm/
Dirq.h44 # define __save_and_cli_hw(x) \ argument
48 : "=&d"(x) \
53 # define __save_and_cli_hw(x) \ argument
56 : "=&d"(x) \
60 #define irqs_enabled_from_flags_hw(x) ((x) != __all_masked_irq_flags) argument
62 #define local_test_iflag_hw(x) irqs_enabled_from_flags_hw(x) argument
64 #define local_save_flags(x) \ argument
66 (x) = __ipipe_test_root() ? \
71 #define local_irq_save(x) \ argument
73 (x) = __ipipe_test_and_stall_root() ? \
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/arch/arm/mach-lh7a40x/include/mach/
Dhardware.h18 #define io_p2v(x) (0xf0000000 | (((x) & 0xfff00000) >> 4) | ((x) & 0x0000ffff)) argument
19 #define io_v2p(x) ( (((x) & 0x0fff0000) << 4) | ((x) & 0x0000ffff)) argument
23 # define __REG(x) io_p2v(x)
24 # define __PREG(x) io_v2p(x)
29 # define __REG(x) (*((volatile u32 *)io_p2v(x)))
39 # define __REGP(x) ((__regbase *)((x)&~4095))->offset[((x)&4095)>>2] argument
40 # define __REG(x) __REGP(io_p2v(x)) argument
42 # define __REGP16(x) ((__regbase16 *)((x)&~4095))->offset[((x)&4095)>>1] argument
43 # define __REG16(x) __REGP16(io_p2v(x)) argument
45 # define __REGP8(x) ((__regbase8 *)((x)&~4095))->offset[(x)&4095] argument
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/arch/parisc/include/asm/
Dpage.h56 #define pte_val(x) ((x).pte) argument
58 #define pmd_val(x) ((x).pmd + 0) argument
59 #define pgd_val(x) ((x).pgd + 0) argument
60 #define pgprot_val(x) ((x).pgprot) argument
62 #define __pte(x) ((pte_t) { (x) } ) argument
63 #define __pmd(x) ((pmd_t) { (x) } ) argument
64 #define __pgd(x) ((pgd_t) { (x) } ) argument
65 #define __pgprot(x) ((pgprot_t) { (x) } ) argument
67 #define __pmd_val_set(x,n) (x).pmd = (n) argument
68 #define __pgd_val_set(x,n) (x).pgd = (n) argument
[all …]
/arch/alpha/include/asm/
Dpage.h35 #define pte_val(x) ((x).pte) argument
36 #define pmd_val(x) ((x).pmd) argument
37 #define pgd_val(x) ((x).pgd) argument
38 #define pgprot_val(x) ((x).pgprot) argument
40 #define __pte(x) ((pte_t) { (x) } ) argument
41 #define __pmd(x) ((pmd_t) { (x) } ) argument
42 #define __pgd(x) ((pgd_t) { (x) } ) argument
43 #define __pgprot(x) ((pgprot_t) { (x) } ) argument
54 #define pte_val(x) (x) argument
55 #define pmd_val(x) (x) argument
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/arch/powerpc/include/asm/
Dpage.h109 #define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET - MEMORY_START)) argument
110 #define __pa(x) ((unsigned long)(x) - PAGE_OFFSET + MEMORY_START) argument
140 #define is_kernel_addr(x) ((x) >= PAGE_OFFSET) argument
151 #define pte_val(x) ((x).pte) argument
152 #define __pte(x) ((pte_t) { (x) }) argument
166 #define pmd_val(x) ((x).pmd) argument
167 #define __pmd(x) ((pmd_t) { (x) }) argument
172 #define pud_val(x) ((x).pud) argument
173 #define __pud(x) ((pud_t) { (x) }) argument
179 #define pgd_val(x) ((x).pgd) argument
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/arch/arm/plat-omap/include/mach/
Dpm.h158 #define omap_serial_wake_trigger(x) {} argument
161 #define ARM_SAVE(x) arm_sleep_save[ARM_SLEEP_SAVE_##x] = omap_readl(x) argument
162 #define ARM_RESTORE(x) omap_writel((arm_sleep_save[ARM_SLEEP_SAVE_##x]), (x)) argument
163 #define ARM_SHOW(x) arm_sleep_save[ARM_SLEEP_SAVE_##x] argument
165 #define DSP_SAVE(x) dsp_sleep_save[DSP_SLEEP_SAVE_##x] = __raw_readw(x) argument
166 #define DSP_RESTORE(x) __raw_writew((dsp_sleep_save[DSP_SLEEP_SAVE_##x]), (x)) argument
167 #define DSP_SHOW(x) dsp_sleep_save[DSP_SLEEP_SAVE_##x] argument
169 #define ULPD_SAVE(x) ulpd_sleep_save[ULPD_SLEEP_SAVE_##x] = omap_readw(x) argument
170 #define ULPD_RESTORE(x) omap_writew((ulpd_sleep_save[ULPD_SLEEP_SAVE_##x]), (x)) argument
171 #define ULPD_SHOW(x) ulpd_sleep_save[ULPD_SLEEP_SAVE_##x] argument
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/arch/mips/math-emu/
Dieee754.h106 int ieee754sp_finite(ieee754sp x);
107 int ieee754sp_class(ieee754sp x);
109 ieee754sp ieee754sp_abs(ieee754sp x);
110 ieee754sp ieee754sp_neg(ieee754sp x);
111 ieee754sp ieee754sp_scalb(ieee754sp x, int);
112 ieee754sp ieee754sp_logb(ieee754sp x);
115 ieee754sp ieee754sp_copysign(ieee754sp x, ieee754sp y);
117 ieee754sp ieee754sp_add(ieee754sp x, ieee754sp y);
118 ieee754sp ieee754sp_sub(ieee754sp x, ieee754sp y);
119 ieee754sp ieee754sp_mul(ieee754sp x, ieee754sp y);
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/arch/arm/mach-pxa/include/mach/
Dpxa-regs.h73 #define DCSR(x) __REG2(0x40000000, (x) << 2) argument
104 #define DDADR(x) __REG2(0x40000200, (x) << 4) argument
105 #define DSADR(x) __REG2(0x40000204, (x) << 4) argument
106 #define DTADR(x) __REG2(0x40000208, (x) << 4) argument
107 #define DCMD(x) __REG2(0x4000020c, (x) << 4) argument
242 #define GPIO_bit(x) (1 << ((x) & 0x1f)) argument
244 #define _GPLR(x) __REG2(0x40E00000, ((x) & 0x60) >> 3) argument
245 #define _GPDR(x) __REG2(0x40E0000C, ((x) & 0x60) >> 3) argument
246 #define _GPSR(x) __REG2(0x40E00018, ((x) & 0x60) >> 3) argument
247 #define _GPCR(x) __REG2(0x40E00024, ((x) & 0x60) >> 3) argument
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