Searched refs:AGNX_PM_PLLCTL (Results 1 – 3 of 3) sorted by relevance
/drivers/staging/agnx/ |
D | rf.c | 436 reg = agnx_read32(ctl, AGNX_PM_PLLCTL); in radio_channel_set() 438 agnx_write32(ctl, AGNX_PM_PLLCTL, reg); in radio_channel_set() 503 reg = agnx_read32(ctl, AGNX_PM_PLLCTL); in radio_channel_set() 506 agnx_write32(ctl, AGNX_PM_PLLCTL, reg); in radio_channel_set() 775 reg = agnx_read32(ctl, AGNX_PM_PLLCTL); in antenna_calibrate() 777 agnx_write32(ctl, AGNX_PM_PLLCTL, reg); in antenna_calibrate()
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D | phy.c | 640 reg = agnx_read32(ctl, AGNX_PM_PLLCTL); in phy_init() 642 agnx_write32(ctl, AGNX_PM_PLLCTL, reg); in phy_init() 833 agnx_write32(ctl, AGNX_PM_PLLCTL, 0x1); in card_interface_init()
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D | phy.h | 203 #define AGNX_PM_PLLCTL 0x3c1c /* PMU PLL control*/ macro
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