Searched refs:BIT14 (Results 1 – 10 of 10) sorted by relevance
250 #define HFA384x_CMD_AINFO ((u16)(BIT14 | BIT13 | BIT12 | BIT11 | BIT10 | BIT9 | BIT8))257 #define HFA384x_STATUS_RESULT ((u16)(BIT14 | BIT13 | BIT12 | BIT11 | BIT10 | BIT9 | BIT8))261 #define HFA384x_OFFSET_ERR ((u16)BIT14)265 #define HFA384x_EVSTAT_WTERR ((u16)BIT14)280 #define HFA384x_intEN_WTERR ((u16)BIT14)291 #define HFA384x_EVACK_WTERR ((u16)BIT14)301 #define HFA384x_CONTROL_AUXEN ((u16)(BIT15 | BIT14))1696 #define HFA384x_RXSTATUS_MSGTYPE ((u16)(BIT15 | BIT14 | BIT13))2445 #define MM_SAT_PCF (BIT14)2447 #define MM_GCSD_PCF_EB (BIT14 | BIT15)
69 #define BIT14 0x00004000 macro
178 #define WLAN_GET_FC_ISWEP(n) ((((u16)(n)) & (BIT14)) >> 14)
730 hw->mm_mods = hw->ident_sta_fw.variant & (BIT14 | BIT15); in prism2sta_getcardinfo()731 hw->ident_sta_fw.variant &= ~((u16)(BIT14 | BIT15)); in prism2sta_getcardinfo()
177 #define BIT14 0x00004000 macro220 #define SRB_UNEXPECT_RESEL BIT14
61 #define BIT14 0x00004000 macro
562 #define MISCSTATUS_RXC BIT14582 #define SICR_RXC_INACTIVE BIT14583 #define SICR_RXC (BIT15+BIT14)1849 usc_OutReg(info, PCR, (u16)((usc_InReg(info, PCR) | BIT15) | BIT14)); in shutdown()4733 RegValue |= BIT14; in usc_set_sdlc_mode()4737 RegValue |= BIT15 + BIT14; in usc_set_sdlc_mode()4777 case HDLC_ENCODING_NRZI_MARK: RegValue |= BIT14; break; in usc_set_sdlc_mode()4778 case HDLC_ENCODING_NRZI_SPACE: RegValue |= BIT14 + BIT13; break; in usc_set_sdlc_mode()4781 case HDLC_ENCODING_BIPHASE_LEVEL: RegValue |= BIT15 + BIT14; break; in usc_set_sdlc_mode()4782 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: RegValue |= BIT15 + BIT14 + BIT13; break; in usc_set_sdlc_mode()[all …]
379 #define MASK_BREAK BIT14404 #define RXIDLE BIT14405 #define RXBREAK BIT144093 val = BIT15 + BIT14 + BIT0; in async_mode()4129 case MGSL_MODE_MONOSYNC: val |= BIT14 + BIT13; break; in sync_mode()4195 case MGSL_MODE_MONOSYNC: val |= BIT14 + BIT13; break; in sync_mode()4302 wr_reg16(info, SCR, BIT15 + BIT14 + BIT0); in sync_mode()
40 #define BIT14 0x00004000 macro
295 #define IRQ_DATAOVERRUN BIT14 // receive data overflow