Searched refs:BIT_4 (Results 1 – 9 of 9) sorted by relevance
37 #define PDF_CLASS_2 BIT_4669 #define LCF_COND_PLOGI BIT_4 /* PLOGI only if not logged-in. */670 #define LCF_IMPL_LOGO BIT_4 /* Perform an implicit LOGO. */671 #define LCF_IMPL_PRLO BIT_4 /* Perform an implicit PRLO. */728 #define TCF_LUN_RESET BIT_4839 #define CSRX_MAX_WRT_BURST_MASK (BIT_5|BIT_4)881 #define HCCRX_RISC_PAUSE BIT_4 /* RISC Pause mode bit. */909 #define GPDX_LED_COLOR_MASK (BIT_4|BIT_3|BIT_2)915 #define GPDX_LED_AMBER_ON BIT_41286 #define FSTATE_WAITING_FOR_VERIFY BIT_4
58 #define BIT_4 0x10 macro209 #define SRB_ABORTED BIT_4 /* Command aborted command already */519 #define FO1_DISABLE_LIP_F7_SW BIT_4664 #define MBX_4 BIT_41291 #define RF_INV_E_COUNT BIT_4 /* Invalid entry count. */1309 #define SS_RESERVE_CONFLICT (BIT_4 | BIT_3)1584 #define FCF_RESET_NEEDED BIT_42337 #define DT_ISP2322 BIT_42461 #define MBX_COMPLETED BIT_42645 #define DFLG_NO_CABLE BIT_4
1093 (BIT_4 | BIT_3)) >> 3; in qla2x00_update_fw_options()1097 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; in qla2x00_update_fw_options()1115 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; in qla2x00_update_fw_options()1699 nv->add_firmware_options[1] = BIT_5 | BIT_4; in qla2x00_nvram_config()1706 nv->add_firmware_options[1] = BIT_5 | BIT_4; in qla2x00_nvram_config()1760 nv->firmware_options[0] &= ~(BIT_5 | BIT_4); in qla2x00_nvram_config()1762 nv->firmware_options[1] &= ~BIT_4; in qla2x00_nvram_config()1767 nv->add_firmware_options[1] |= BIT_5 | BIT_4; in qla2x00_nvram_config()1785 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == in qla2x00_nvram_config()1786 (BIT_5 | BIT_4)) { in qla2x00_nvram_config()[all …]
625 options |= BIT_4; in qla25xx_create_req_que()701 options |= BIT_4; in qla25xx_create_rsp_que()
1168 if ((pd24->prli_svc_param_word_3[0] & BIT_4) == 0) in qla2x00_get_port_database()1195 if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0) in qla2x00_get_port_database()1201 fcport->supported_classes = (pd->options & BIT_4) ? in qla2x00_get_port_database()1547 if (iop[0] & BIT_4) { in qla24xx_login_fabric()2772 vpmod->options_idx1 = BIT_3|BIT_4|BIT_5; in qla24xx_modify_vp_config()
328 (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4; in qla24xx_pci_info_str()
30 #define BIT_4 0x10 macro132 #define ISP_CFG0_1040B BIT_4 /* ISP1040B */136 #define ISP_CFG1_F64 BIT_4|BIT_5 /* 128-byte FIFO threshold */138 #define ISP_CFG1_F16 BIT_4 /* 128-byte FIFO threshold */
1727 err = qla1280_mailbox_command(ha, BIT_4 | BIT_3 | BIT_2 | in qla1280_load_firmware_dma()1744 err = qla1280_mailbox_command(ha, BIT_4 | BIT_3 | BIT_2 | in qla1280_load_firmware_dma()1865 if (!(status = qla1280_mailbox_command(ha, BIT_7 | BIT_6 | BIT_4 | in qla1280_init_rings()2148 cfg1 = RD_REG_WORD(®->cfg_1) & ~(BIT_4 | BIT_5 | BIT_6); in qla1280_nvram_config()2230 mb[1] |= BIT_4; in qla1280_nvram_config()2235 mb[2] |= BIT_4; in qla1280_nvram_config()
59 #define BIT_4 0x10 macro162 #define SRB_GOT_SENSE BIT_4 /* sense data recieved. */