Searched refs:BIT_5 (Results 1 – 10 of 10) sorted by relevance
31 #define BIT_5 0x20 macro133 #define ISP_CFG0_1040C BIT_5 /* ISP1040C */136 #define ISP_CFG1_F64 BIT_4|BIT_5 /* 128-byte FIFO threshold */137 #define ISP_CFG1_F32 BIT_5 /* 128-byte FIFO threshold */318 #define TP_PPR BIT_5 /* PPR */
481 return BIT_5; in qla1280_data_direction()485 return BIT_5 | BIT_6; in qla1280_data_direction()1879 status = qla1280_mailbox_command(ha, BIT_7 | BIT_6 | BIT_5 | in qla1280_init_rings()2148 cfg1 = RD_REG_WORD(®->cfg_1) & ~(BIT_4 | BIT_5 | BIT_6); in qla1280_nvram_config()2228 mb[1] |= BIT_5; in qla1280_nvram_config()2233 mb[2] |= BIT_5; in qla1280_nvram_config()3968 if ((mb[2] & BIT_5) && ((mb[6] >> 8) & 0xff) >= 2) in qla1280_get_target_parameters()
59 #define BIT_5 0x20 macro210 #define SRB_RETRY BIT_5 /* Command needs retrying */328 #define HCCR_RISC_PAUSE BIT_5 /* Pause mode bit */520 #define FO1_DISABLE_100MS_LOS_WAIT BIT_5541 #define ADD_FO2_ENABLE_SEL_CLS2 BIT_5663 #define MBX_5 BIT_51177 #define CF_READ BIT_51290 #define RF_INV_E_ORDER BIT_5 /* Invalid entry order. */1585 #define FCF_PERSISTENT_BOUND BIT_52338 #define DT_ISP6312 BIT_5[all …]
19 #define FO2_ENABLE_SEL_CLASS2 BIT_536 #define PDF_FCP2_CONF BIT_5667 #define LCF_SKIP_PRLI BIT_5 /* Skip PRLI after PLOGI. */668 #define LCF_IMPL_LOGO_ALL BIT_5 /* Implicit LOGO to all ports. */839 #define CSRX_MAX_WRT_BURST_MASK (BIT_5|BIT_4)880 #define HCCRX_RISC_RESET BIT_5 /* RISC Reset mode bit. */
1097 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; in qla2x00_update_fw_options()1104 ha->fw_options[10] |= BIT_5 | in qla2x00_update_fw_options()1110 (BIT_7 | BIT_6 | BIT_5)) >> 5; in qla2x00_update_fw_options()1115 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; in qla2x00_update_fw_options()1122 ha->fw_options[11] |= BIT_5 | in qla2x00_update_fw_options()1697 nv->firmware_options[1] = BIT_7 | BIT_5; in qla2x00_nvram_config()1698 nv->add_firmware_options[0] = BIT_5; in qla2x00_nvram_config()1699 nv->add_firmware_options[1] = BIT_5 | BIT_4; in qla2x00_nvram_config()1704 nv->firmware_options[1] = BIT_7 | BIT_5; in qla2x00_nvram_config()1705 nv->add_firmware_options[0] = BIT_5; in qla2x00_nvram_config()[all …]
628 options |= BIT_5; in qla25xx_create_req_que()704 options |= BIT_5; in qla25xx_create_rsp_que()
1191 pd->common_features & BIT_5 ? (fcport->flags |= FCF_AUTH_REQ) : in qla2x00_get_port_database()2772 vpmod->options_idx1 = BIT_3|BIT_4|BIT_5; in qla24xx_modify_vp_config()
1722 if ((flash_data & BIT_5) && cnt > 2) in qla2x00_poll_flash()
328 (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4; in qla24xx_pci_info_str()
60 #define BIT_5 0x20 macro