Searched refs:MDIO_REG_ADDR_MASK (Results 1 – 9 of 9) sorted by relevance
218 val = ((u32)(reg_addr & MDIO_REG_ADDR_MASK)) << MDIO_REG_ADDR_SHIFT | in atl1e_read_phy_reg()253 (reg_addr&MDIO_REG_ADDR_MASK) << MDIO_REG_ADDR_SHIFT | in atl1e_write_phy_reg()
232 #define MDIO_REG_ADDR_MASK 0x1f /* MDIO register address */ macro
418 atl1e_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result); in atl1e_mdio_read()427 atl1e_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val); in atl1e_mdio_write()2373 adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK; in atl1e_probe()
235 val = ((u32)(reg_addr & MDIO_REG_ADDR_MASK)) << MDIO_REG_ADDR_SHIFT | in atl1c_read_phy_reg()267 (reg_addr & MDIO_REG_ADDR_MASK) << MDIO_REG_ADDR_SHIFT | in atl1c_write_phy_reg()
240 #define MDIO_REG_ADDR_MASK 0x1f /* MDIO register address */ macro
482 atl1c_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result); in atl1c_mdio_read()491 atl1c_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val); in atl1c_mdio_write()2580 adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK; in atl1c_probe()
178 #define MDIO_REG_ADDR_MASK 0x1F macro
2537 val = ((u32)(reg_addr & MDIO_REG_ADDR_MASK)) << MDIO_REG_ADDR_SHIFT |2573 (reg_addr & MDIO_REG_ADDR_MASK) << MDIO_REG_ADDR_SHIFT |
355 val = ((u32) (reg_addr & MDIO_REG_ADDR_MASK)) << MDIO_REG_ADDR_SHIFT | in atl1_read_phy_reg()600 (reg_addr & MDIO_REG_ADDR_MASK) << MDIO_REG_ADDR_SHIFT | in atl1_write_phy_reg()