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Searched refs:chips (Results 1 – 25 of 99) sorted by relevance

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/drivers/mtd/chips/
DKconfig1 # drivers/mtd/chips/Kconfig
7 tristate "Detect flash chips by Common Flash Interface (CFI) probe"
19 tristate "Detect non-CFI AMD/JEDEC-compatible flash chips"
22 This option enables JEDEC-style probing of flash chips which are not
24 CFI-targetted flash drivers for any chips which are identified which
26 covers most AMD/Fujitsu-compatible chips and also non-CFI
27 Intel chips.
37 chips, or if you wish to reduce the size of the kernel by including
38 support for only specific arrangements of flash chips, say 'Y'. This
53 data bits when writing the 'magic' commands to the chips. Saying
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Dcfi_cmdset_0002.c429 cfi->chips[i].word_write_time = 1<<cfi->cfiq->WordWriteTimeoutTyp; in cfi_cmdset_0002()
430 cfi->chips[i].buffer_write_time = 1<<cfi->cfiq->BufWriteTimeoutTyp; in cfi_cmdset_0002()
431 cfi->chips[i].erase_time = 1<<cfi->cfiq->BlockEraseTimeoutTyp; in cfi_cmdset_0002()
432 cfi->chips[i].ref_point_counter = 0; in cfi_cmdset_0002()
433 init_waitqueue_head(&(cfi->chips[i].wq)); in cfi_cmdset_0002()
946 ret = do_read_onechip(map, &cfi->chips[chipnum], ofs, thislen, buf); in cfi_amdstd_read()
1040 ret = do_read_secsi_onechip(map, &cfi->chips[chipnum], ofs, thislen, buf); in cfi_amdstd_secsi_read()
1179 chipstart = cfi->chips[chipnum].start; in cfi_amdstd_write_words()
1189 spin_lock(cfi->chips[chipnum].mutex); in cfi_amdstd_write_words()
1191 if (cfi->chips[chipnum].state != FL_READY) { in cfi_amdstd_write_words()
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Dcfi_cmdset_0001.c465 cfi->chips[i].word_write_time = in cfi_cmdset_0001()
468 cfi->chips[i].word_write_time = 50000; in cfi_cmdset_0001()
471 cfi->chips[i].buffer_write_time = in cfi_cmdset_0001()
476 cfi->chips[i].erase_time = in cfi_cmdset_0001()
479 cfi->chips[i].erase_time = 2000000; in cfi_cmdset_0001()
483 cfi->chips[i].word_write_time_max = in cfi_cmdset_0001()
487 cfi->chips[i].word_write_time_max = 50000 * 8; in cfi_cmdset_0001()
491 cfi->chips[i].buffer_write_time_max = in cfi_cmdset_0001()
497 cfi->chips[i].erase_time_max = in cfi_cmdset_0001()
501 cfi->chips[i].erase_time_max = 2000000 * 8; in cfi_cmdset_0001()
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Dcfi_cmdset_0020.c156 cfi->chips[i].word_write_time = 128; in cfi_cmdset_0020()
157 cfi->chips[i].buffer_write_time = 128; in cfi_cmdset_0020()
158 cfi->chips[i].erase_time = 1024; in cfi_cmdset_0020()
159 cfi->chips[i].ref_point_counter = 0; in cfi_cmdset_0020()
160 init_waitqueue_head(&(cfi->chips[i].wq)); in cfi_cmdset_0020()
408 ret = do_read_onechip(map, &cfi->chips[chipnum], ofs, thislen, buf); in cfi_staa_read()
639 ret = do_write_buffer(map, &cfi->chips[chipnum], in cfi_staa_write_buffers()
959 ret = do_erase_oneblock(map, &cfi->chips[chipnum], adr); in cfi_staa_erase_varsize()
995 chip = &cfi->chips[i]; in cfi_staa_sync()
1031 chip = &cfi->chips[i]; in cfi_staa_sync()
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/drivers/mtd/maps/
DKconfig7 bool "Support non-linear mappings of flash chips"
10 paged mappings of flash chips.
17 ROM driver code to communicate with chips which are mapped
19 the physical address and size of the flash chips on your
42 This is the physical memory location at which the flash chips
54 This is the total length of the mapping of the flash chips on
56 physical memory map between the chips, this could be larger
80 ROM driver code to communicate with chips which are mapped
90 in which user-programmable flash chips are connected on the
122 which user-programmable flash chips are connected on various
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/drivers/mtd/lpddr/
DKconfig1 # drivers/mtd/chips/Kconfig
7 tristate "Support for LPDDR flash chips"
11 flash chips. Synonymous with Mobile-DDR. It is a new standard for
16 tristate "Detect flash chips by QINFO probe"
18 Device Information for LPDDR chips is offered through the Overlay
Dlpddr_cmds.c96 chip = &lpddr->chips[0]; in lpddr_cmdset()
102 *chip = lpddr->chips[i]; in lpddr_cmdset()
489 struct flchip *chip = &lpddr->chips[chipnum]; in do_erase_oneblock()
517 struct flchip *chip = &lpddr->chips[chipnum]; in lpddr_read()
542 struct flchip *chip = &lpddr->chips[chipnum]; in lpddr_point()
585 chip = &lpddr->chips[chipnum]; in lpddr_point()
604 chip = &lpddr->chips[chipnum]; in lpddr_unpoint()
674 ret = do_write_buffer(map, &lpddr->chips[chipnum], in lpddr_writev()
727 struct flchip *chip = &lpddr->chips[chipnum]; in do_xxlock()
771 struct flchip *chip = &lpddr->chips[chipnum]; in word_program()
/drivers/hwmon/
DKconfig75 AD7416, AD7417 and AD7418 temperature monitoring chips.
101 and ADM1023 sensor chips and clones: Maxim MAX1617 and MAX1617A,
114 and Philips NE1619 sensor chips.
146 and ADM1030 sensor chips.
157 Dallas DS1780, National Semiconductor LM81 sensor chips.
167 ADT7462 temperature monitoring chips.
177 ADT7470 temperature monitoring chips.
187 ADT7473 temperature monitoring chips.
197 ADT7475 hardware monitoring chips.
270 DS1621 and DS1625 sensor chips.
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/drivers/mtd/devices/
Ddoc2001.c262 this->chips = kmalloc(sizeof(struct Nand) * this->numchips, GFP_KERNEL); in DoC_ScanChips()
263 if (!this->chips){ in DoC_ScanChips()
272 this->chips[ret].floor = floor; in DoC_ScanChips()
273 this->chips[ret].chip = chip; in DoC_ScanChips()
274 this->chips[ret].curadr = 0; in DoC_ScanChips()
275 this->chips[ret].curmode = 0x50; in DoC_ScanChips()
394 struct Nand *mychip = &this->chips[from >> (this->chipshift)]; in doc_read()
505 struct Nand *mychip = &this->chips[to >> (this->chipshift)]; in doc_write()
632 struct Nand *mychip = &this->chips[ofs >> this->chipshift]; in doc_read_oob()
690 struct Nand *mychip = &this->chips[ofs >> this->chipshift]; in doc_write_oob()
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Ddoc2001plus.c385 this->chips = kmalloc(sizeof(struct Nand) * this->numchips, GFP_KERNEL); in DoC_ScanChips()
386 if (!this->chips){ in DoC_ScanChips()
395 this->chips[ret].floor = floor; in DoC_ScanChips()
396 this->chips[ret].chip = chip; in DoC_ScanChips()
397 this->chips[ret].curadr = 0; in DoC_ScanChips()
398 this->chips[ret].curmode = 0x50; in DoC_ScanChips()
516 struct Nand *mychip = &this->chips[from >> (this->chipshift)];
593 struct Nand *mychip = &this->chips[from >> (this->chipshift)]; in doc_read()
712 struct Nand *mychip = &this->chips[to >> (this->chipshift)]; in doc_write()
834 struct Nand *mychip = &this->chips[ofs >> this->chipshift]; in doc_read_oob()
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Ddoc2000.c453 this->chips = kmalloc(sizeof(struct Nand) * this->numchips, GFP_KERNEL); in DoC_ScanChips()
454 if (!this->chips) { in DoC_ScanChips()
465 this->chips[ret].floor = floor; in DoC_ScanChips()
466 this->chips[ret].chip = chip; in DoC_ScanChips()
467 this->chips[ret].curadr = 0; in DoC_ScanChips()
468 this->chips[ret].curmode = 0x50; in DoC_ScanChips()
642 mychip = &this->chips[from >> (this->chipshift)]; in doc_read()
789 mychip = &this->chips[to >> (this->chipshift)]; in doc_write()
940 mychip = &this->chips[ofs >> this->chipshift]; in doc_read_oob()
995 struct Nand *mychip = &this->chips[ofs >> this->chipshift]; in doc_write_oob_nolock()
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DKconfig58 This enables access to AT45xxx DataFlash chips, using SPI.
59 Sometimes DataFlash chips are packaged inside MMC-format
77 Newer DataFlash chips (revisions C and D) support 128 bytes of
84 tristate "Support most SPI Flash chips (AT26DF, M25P, W25X, ...)"
87 This enables access to most modern SPI flash chips, used for
89 Spansion S25SL, SST 25VF, ST M25P, and Winbond W25X. Other chips
91 or to add other chips.
93 Note that the original DataFlash chips (AT45 series, not AT26DF),
200 chips.
221 chips.
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/drivers/net/wireless/rt2x00/
DKconfig27 Supported chips: RT2460.
38 Supported chips: RT2560.
52 Supported chips: RT2561, RT2561S & RT2661.
63 Supported chips: RT2571 & RT2572.
76 Supported chips: RT2571W, RT2573 & RT2671.
/drivers/mtd/nand/
Dnand_bbt.c462 int i, chips; in search_bbt() local
479 chips = this->numchips; in search_bbt()
483 chips = 1; in search_bbt()
490 for (i = 0; i < chips; i++) { in search_bbt()
513 for (i = 0; i < chips; i++) { in search_bbt()
776 int i, chips, writeops, chipsel, res; in check_create() local
784 chips = this->numchips; in check_create()
786 chips = 1; in check_create()
788 for (i = 0; i < chips; i++) { in check_create()
890 int i, j, chips, block, nrblocks, update; in mark_bbt_region() local
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DKconfig36 NAND chips (page size 256 byte, erase size 4-8KiB). The IDs
37 of these chips were reused by later, larger chips.
278 The CS553x companion chips for the AMD Geode processor
344 bool "Use builtin definitions for some NAND chips (deprecated)"
347 This enables builtin definitions for some NAND chips. This
372 The simulator may simulate various NAND flash chips for the
403 Various Freescale chips, including the 8313, include a NAND Flash
413 Enables support for NAND Flash chips wired onto Freescale PowerPC
/drivers/gpio/
Dmcp23s08.c307 unsigned chips = 0; in mcp23s08_probe() local
321 chips++; in mcp23s08_probe()
323 if (!chips) in mcp23s08_probe()
326 data = kzalloc(sizeof *data + chips * sizeof(struct mcp23s08), in mcp23s08_probe()
336 chips--; in mcp23s08_probe()
337 data->mcp[addr] = &data->chip[chips]; in mcp23s08_probe()
/drivers/rtc/
DKconfig145 chips (often with battery backup) connected with I2C. This driver
147 and probably other chips. In some cases the RTC must already
150 The first seven registers on these chips hold an RTC, and other
163 DS1374 real-time clock chips. If an interrupt is associated
191 Ricoh R2025S/D, RS5C372A, RS5C372B, RV5C386, and RV5C387A RTC chips.
240 and M41T80 RTC chips series. Currently, the following chips are
252 watchdog timer in the ST M41T60 and M41T80 RTC chips series.
274 TWL4030 family chips, used mostly with OMAP3 platforms.
293 Ramtron FM3130 RTC chips.
327 and DS1306 real time clock chips. These support a trickle
[all …]
/drivers/i2c/chips/
DKconfig25 PCF8574A chips. These chips are 8-bit I/O expanders for the I2C bus.
43 chip manufacturers sell equivalent chips, e.g. Texas Instruments.
72 If you say yes here you get support for Philips PCF8591 chips.
/drivers/spi/
DKconfig20 chips, analog to digital (and d-to-a) converters, and more.
39 # MASTER side ... talking to discrete SPI slave chips including microcontrollers
49 controller and the protocol drivers for the SPI slave chips
61 many AT32 (AVR32) and AT91 (ARM) chips.
159 This hooks up to the MicroWire controller on OMAP1 chips.
172 This enables using the SPI master controller on the Orion chips.
246 SPI driver for Infineon TLE62X0 series line driver chips,
/drivers/mtd/onenand/
DKconfig61 Now the following chips support it. (KFXXX16Q2M)
65 And more recent chips
71 The simulator may simulate various OneNAND flash chips for the
/drivers/media/video/em28xx/
DKconfig26 implementing the USB Audio Class. For those chips, this module
40 Empiatech em28xx chips.
/drivers/net/tulip/
DKconfig20 21040 (Tulip series) chips. Some LinkSys PCI cards are
37 21140 (Tulip series) chips. Some LinkSys PCI cards are
148 It should work with most DEC 21*4*-based chips/ethercards, as well
149 as with work-alike chips from Lite-On (PNIC) and Macronix (MXIC) and
/drivers/mtd/
DKconfig5 Memory Technology Devices are flash, RAM and similar chips, often
33 file system spanning multiple physical flash chips. If unsure,
180 memory chips, and also use ioctl() to obtain information about
198 Although most flash chips have an erase size too large to be useful
200 on RAM chips in this manner. This block device is a user of MTD
209 on flash chips to emulate a smaller block size. Needless to say,
317 source "drivers/mtd/chips/Kconfig"
/drivers/mfd/
DKconfig57 chips labeled "AIC2" and "AIC3", found on HTC Blueangel and
73 tristate "TPS6501x Power Management chips"
78 Power Management chips. These include voltage regulators,
104 These multi-function chips are found on many OMAP2 and OMAP3
/drivers/i2c/
DMakefile8 obj-y += busses/ chips/ algos/

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