Searched refs:phy_ctl (Results 1 – 5 of 5) sorted by relevance
200 u16 phy_ctl = 0; in b43_generate_txhdr() local290 phy_ctl |= B43_TXH_PHY_ENC_OFDM; in b43_generate_txhdr()292 phy_ctl |= B43_TXH_PHY_ENC_CCK; in b43_generate_txhdr()294 phy_ctl |= B43_TXH_PHY_SHORTPRMBL; in b43_generate_txhdr()298 phy_ctl |= B43_TXH_PHY_ANT01AUTO; in b43_generate_txhdr()301 phy_ctl |= B43_TXH_PHY_ANT0; in b43_generate_txhdr()304 phy_ctl |= B43_TXH_PHY_ANT1; in b43_generate_txhdr()307 phy_ctl |= B43_TXH_PHY_ANT2; in b43_generate_txhdr()310 phy_ctl |= B43_TXH_PHY_ANT3; in b43_generate_txhdr()433 txhdr->phy_ctl = cpu_to_le16(phy_ctl); in b43_generate_txhdr()
26 __le16 phy_ctl; /* PHY TX control */ member
202 u16 phy_ctl = 0; in generate_txhdr_fw3() local277 phy_ctl |= B43legacy_TX4_PHY_OFDM; in generate_txhdr_fw3()279 phy_ctl |= B43legacy_TX4_PHY_SHORTPRMBL; in generate_txhdr_fw3()282 phy_ctl |= B43legacy_TX4_PHY_ANTLAST; in generate_txhdr_fw3()285 phy_ctl |= B43legacy_TX4_PHY_ANT0; in generate_txhdr_fw3()288 phy_ctl |= B43legacy_TX4_PHY_ANT1; in generate_txhdr_fw3()368 txhdr->phy_ctl = cpu_to_le16(phy_ctl); in generate_txhdr_fw3()
28 __le16 phy_ctl; /* PHY TX control */ member
126 u8 phy_ctl; // PHY Control Reg(Reg 0x17) member