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Searched refs:phy_ctrl (Results 1 – 8 of 8) sorted by relevance

/drivers/net/
Dsc92031.c565 u32 phy_ctrl; in _sc92031_phy_reset() local
567 phy_ctrl = ioread32(port_base + PhyCtrl); in _sc92031_phy_reset()
568 phy_ctrl &= ~(PhyCtrlDux | PhyCtrlSpd100 | PhyCtrlSpd10); in _sc92031_phy_reset()
569 phy_ctrl |= PhyCtrlAne | PhyCtrlReset; in _sc92031_phy_reset()
574 phy_ctrl |= PhyCtrlDux | PhyCtrlSpd100 | PhyCtrlSpd10; in _sc92031_phy_reset()
577 phy_ctrl |= PhyCtrlSpd10; in _sc92031_phy_reset()
580 phy_ctrl |= PhyCtrlDux | PhyCtrlSpd10; in _sc92031_phy_reset()
583 phy_ctrl |= PhyCtrlSpd100; in _sc92031_phy_reset()
586 phy_ctrl |= PhyCtrlDux | PhyCtrlSpd100; in _sc92031_phy_reset()
590 iowrite32(phy_ctrl, port_base + PhyCtrl); in _sc92031_phy_reset()
[all …]
/drivers/net/igb/
De1000_phy.c40 u16 *phy_ctrl);
585 u16 phy_ctrl; in igb_copper_link_autoneg() local
612 ret_val = hw->phy.ops.read_phy_reg(hw, PHY_CONTROL, &phy_ctrl); in igb_copper_link_autoneg()
616 phy_ctrl |= (MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG); in igb_copper_link_autoneg()
617 ret_val = hw->phy.ops.write_phy_reg(hw, PHY_CONTROL, phy_ctrl); in igb_copper_link_autoneg()
1006 u16 *phy_ctrl) in igb_phy_force_speed_duplex_setup() argument
1023 *phy_ctrl &= ~MII_CR_AUTO_NEG_EN; in igb_phy_force_speed_duplex_setup()
1028 *phy_ctrl &= ~MII_CR_FULL_DUPLEX; in igb_phy_force_speed_duplex_setup()
1032 *phy_ctrl |= MII_CR_FULL_DUPLEX; in igb_phy_force_speed_duplex_setup()
1039 *phy_ctrl |= MII_CR_SPEED_100; in igb_phy_force_speed_duplex_setup()
[all …]
/drivers/net/e1000e/
Dich8lan.c819 u32 phy_ctrl; in e1000_set_d0_lplu_state_ich8lan() local
826 phy_ctrl = er32(PHY_CTRL); in e1000_set_d0_lplu_state_ich8lan()
829 phy_ctrl |= E1000_PHY_CTRL_D0A_LPLU; in e1000_set_d0_lplu_state_ich8lan()
830 ew32(PHY_CTRL, phy_ctrl); in e1000_set_d0_lplu_state_ich8lan()
847 phy_ctrl &= ~E1000_PHY_CTRL_D0A_LPLU; in e1000_set_d0_lplu_state_ich8lan()
848 ew32(PHY_CTRL, phy_ctrl); in e1000_set_d0_lplu_state_ich8lan()
900 u32 phy_ctrl; in e1000_set_d3_lplu_state_ich8lan() local
904 phy_ctrl = er32(PHY_CTRL); in e1000_set_d3_lplu_state_ich8lan()
907 phy_ctrl &= ~E1000_PHY_CTRL_NOND0A_LPLU; in e1000_set_d3_lplu_state_ich8lan()
908 ew32(PHY_CTRL, phy_ctrl); in e1000_set_d3_lplu_state_ich8lan()
[all …]
Dphy.c815 u16 phy_ctrl; in e1000_copper_link_autoneg() local
842 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy_ctrl); in e1000_copper_link_autoneg()
846 phy_ctrl |= (MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG); in e1000_copper_link_autoneg()
847 ret_val = e1e_wphy(hw, PHY_CONTROL, phy_ctrl); in e1000_copper_link_autoneg()
1111 void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl) in e1000e_phy_force_speed_duplex_setup() argument
1128 *phy_ctrl &= ~MII_CR_AUTO_NEG_EN; in e1000e_phy_force_speed_duplex_setup()
1133 *phy_ctrl &= ~MII_CR_FULL_DUPLEX; in e1000e_phy_force_speed_duplex_setup()
1137 *phy_ctrl |= MII_CR_FULL_DUPLEX; in e1000e_phy_force_speed_duplex_setup()
1144 *phy_ctrl |= MII_CR_SPEED_100; in e1000e_phy_force_speed_duplex_setup()
1145 *phy_ctrl &= ~(MII_CR_SPEED_1000 | MII_CR_SPEED_10); in e1000e_phy_force_speed_duplex_setup()
[all …]
De1000.h487 extern void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl);
/drivers/net/e1000/
De1000_main.c4232 u16 phy_ctrl; in e1000_smartspeed() local
4245 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl); in e1000_smartspeed()
4246 if (phy_ctrl & CR_1000T_MS_ENABLE) { in e1000_smartspeed()
4247 phy_ctrl &= ~CR_1000T_MS_ENABLE; in e1000_smartspeed()
4249 phy_ctrl); in e1000_smartspeed()
4253 &phy_ctrl)) { in e1000_smartspeed()
4254 phy_ctrl |= (MII_CR_AUTO_NEG_EN | in e1000_smartspeed()
4257 phy_ctrl); in e1000_smartspeed()
4263 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl); in e1000_smartspeed()
4264 phy_ctrl |= CR_1000T_MS_ENABLE; in e1000_smartspeed()
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De1000_hw.c7119 u32 phy_ctrl = 0; in e1000_set_d3_lplu_state() local
7139 phy_ctrl = er32(PHY_CTRL); in e1000_set_d3_lplu_state()
7155 phy_ctrl &= ~E1000_PHY_CTRL_NOND0A_LPLU; in e1000_set_d3_lplu_state()
7156 ew32(PHY_CTRL, phy_ctrl); in e1000_set_d3_lplu_state()
7206 phy_ctrl |= E1000_PHY_CTRL_NOND0A_LPLU; in e1000_set_d3_lplu_state()
7207 ew32(PHY_CTRL, phy_ctrl); in e1000_set_d3_lplu_state()
7247 u32 phy_ctrl = 0; in e1000_set_d0_lplu_state() local
7256 phy_ctrl = er32(PHY_CTRL); in e1000_set_d0_lplu_state()
7265 phy_ctrl &= ~E1000_PHY_CTRL_D0A_LPLU; in e1000_set_d0_lplu_state()
7266 ew32(PHY_CTRL, phy_ctrl); in e1000_set_d0_lplu_state()
[all …]
/drivers/staging/et131x/
Det1310_address_map.h1796 u32 phy_ctrl:16; // bits 0-15 member
1798 u32 phy_ctrl:16; // bits 0-15