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Searched refs:xclk (Results 1 – 8 of 8) sorted by relevance

/drivers/media/video/
Domap24xxcam.c125 u32 xclk) in omap24xxcam_core_xclk_set() argument
127 if (xclk) { in omap24xxcam_core_xclk_set()
128 u32 divisor = CAM_MCLK / xclk; in omap24xxcam_core_xclk_set()
831 if (p.u.bt656.clock_curr != cam->if_u.bt656.xclk) { in omap24xxcam_sensor_if_enable()
832 u32 xclk = p.u.bt656.clock_curr; in omap24xxcam_sensor_if_enable() local
835 if (xclk == 0) in omap24xxcam_sensor_if_enable()
838 if (xclk > CAM_MCLK) in omap24xxcam_sensor_if_enable()
839 xclk = CAM_MCLK; in omap24xxcam_sensor_if_enable()
841 divisor = CAM_MCLK / xclk; in omap24xxcam_sensor_if_enable()
842 if (divisor * xclk < CAM_MCLK) in omap24xxcam_sensor_if_enable()
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Domap24xxcam.h484 u32 xclk; member
/drivers/video/aty/
Datyfb_base.c309 static int xclk; variable
370 int pll, mclk, xclk, ecp_max; member
445 par->pll_limits.xclk = aty_chips[i].xclk; in correct_chipset()
473 par->pll_limits.xclk = 67; in correct_chipset()
481 par->pll_limits.xclk = 67; in correct_chipset()
491 par->pll_limits.xclk = 67; in correct_chipset()
499 par->pll_limits.xclk = 67; in correct_chipset()
511 par->pll_limits.xclk = 67; in correct_chipset()
519 par->pll_limits.xclk = 67; in correct_chipset()
2192 static void __devinit aty_calc_mem_refresh(struct atyfb_par *par, int xclk) in aty_calc_mem_refresh() argument
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Daty128fb.c372 u32 xclk; member
877 par->constants.xclk = BIOS_IN16(bios_pll + 0x08); in aty128_get_pllinfo()
883 par->constants.xclk, par->constants.ref_divider, in aty128_get_pllinfo()
936 par->constants.xclk = round_div((2 * Nx * par->constants.ref_clk), in aty128_timings()
957 if (!par->constants.xclk) in aty128_timings()
958 par->constants.xclk = 0x1d4d; /* same as mclk */ in aty128_timings()
1392 u32 xclk = par->constants.xclk; in aty128_ddafifo() local
1401 n = xclk * fifo_width; in aty128_ddafifo()
Datyfb.h49 int sclk, mclk, mclk_pm, xclk; member
/drivers/media/video/em28xx/
Dem28xx-core.c407 u8 xclk; in em28xx_audio_analog_set() local
425 xclk = dev->board.xclk & 0x7f; in em28xx_audio_analog_set()
427 xclk |= 0x80; in em28xx_audio_analog_set()
429 ret = em28xx_write_reg(dev, EM28XX_R0F_XCLK, xclk); in em28xx_audio_analog_set()
Dem28xx-cards.c131 .xclk = EM28XX_XCLK_FREQUENCY_48MHZ,
163 .xclk = EM28XX_XCLK_FREQUENCY_48MHZ,
566 .xclk = EM28XX_XCLK_IR_RC5_MODE |
1200 .xclk = EM28XX_XCLK_FREQUENCY_12MHZ,
1378 if (!dev->board.xclk) in em28xx_set_model()
1379 dev->board.xclk = EM28XX_XCLK_IR_RC5_MODE | in em28xx_set_model()
1448 em28xx_write_reg(dev, EM28XX_R0F_XCLK, dev->board.xclk & 0x7f); in em28xx_pre_card_setup()
Dem28xx.h373 unsigned char xclk, i2c_speed; member