Home
last modified time | relevance | path

Searched refs:u16 (Results 1 – 25 of 192) sorted by relevance

12345678

/include/linux/spi/
Dads7846.h15 u16 model; /* 7843, 7845, 7846. */
16 u16 vref_delay_usecs; /* 0 for external vref; etc */
17 u16 vref_mv; /* external vref value, milliVolts */
26 u16 settle_delay_usecs;
32 u16 penirq_recheck_delay_usecs;
34 u16 x_plate_ohms;
35 u16 y_plate_ohms;
37 u16 x_min, x_max;
38 u16 y_min, y_max;
39 u16 pressure_min, pressure_max;
[all …]
Dad7877.h9 u16 model; /* 7877 */
10 u16 vref_delay_usecs; /* 0 for external vref; etc */
11 u16 x_plate_ohms;
12 u16 y_plate_ohms;
14 u16 x_min, x_max;
15 u16 y_min, y_max;
16 u16 pressure_min, pressure_max;
/include/linux/
Dcycx_x25.h41 u16 command;
42 u16 link; /* values: 0 or 1 */
43 u16 len; /* values: 0 thru 0x205 (517) */
105 u16 t1;
106 u16 t2;
114 u16 rx_crc_errors;
115 u16 rx_over_errors;
116 u16 n2_tx_frames;
117 u16 n2_rx_frames;
118 u16 tx_timeouts;
[all …]
Drio.h99 u16 did;
100 u16 vid;
102 u16 asm_did;
103 u16 asm_vid;
104 u16 asm_rev;
105 u16 efptr;
115 u16 destid;
142 void (*dinb) (struct rio_mport *mport, void *dev_id, u16 src, u16 dst, u16 info);
219 u16 switchid;
220 u16 hopcount;
[all …]
Drio_drv.h29 u16 * data);
31 u16 data);
37 extern int rio_mport_read_config_32(struct rio_mport *port, u16 destid,
39 extern int rio_mport_write_config_32(struct rio_mport *port, u16 destid,
41 extern int rio_mport_read_config_16(struct rio_mport *port, u16 destid,
42 u8 hopcount, u32 offset, u16 * data);
43 extern int rio_mport_write_config_16(struct rio_mport *port, u16 destid,
44 u8 hopcount, u32 offset, u16 data);
45 extern int rio_mport_read_config_8(struct rio_mport *port, u16 destid,
47 extern int rio_mport_write_config_8(struct rio_mport *port, u16 destid,
[all …]
Dcrc-itu-t.h18 extern u16 const crc_itu_t_table[256];
20 extern u16 crc_itu_t(u16 crc, const u8 *buffer, size_t len);
22 static inline u16 crc_itu_t_byte(u16 crc, const u8 data) in crc_itu_t_byte()
Dcrc16.h20 extern u16 const crc16_table[256];
22 extern u16 crc16(u16 crc, const u8 *buffer, size_t len);
24 static inline u16 crc16_byte(u16 crc, const u8 data) in crc16_byte()
Dcrc-ccitt.h6 extern u16 const crc_ccitt_table[256];
8 extern u16 crc_ccitt(u16 crc, const u8 *buffer, size_t len);
10 static inline u16 crc_ccitt_byte(u16 crc, const u8 c) in crc_ccitt_byte()
Ducb1400.h96 static inline u16 ucb1400_reg_read(struct snd_ac97 *ac97, u16 reg) in ucb1400_reg_read()
101 static inline void ucb1400_reg_write(struct snd_ac97 *ac97, u16 reg, u16 val) in ucb1400_reg_write()
106 static inline u16 ucb1400_gpio_get_value(struct snd_ac97 *ac97, u16 gpio) in ucb1400_gpio_get_value()
111 static inline void ucb1400_gpio_set_value(struct snd_ac97 *ac97, u16 gpio, in ucb1400_gpio_set_value()
112 u16 val) in ucb1400_gpio_set_value()
119 static inline u16 ucb1400_gpio_get_direction(struct snd_ac97 *ac97, u16 gpio) in ucb1400_gpio_get_direction()
124 static inline void ucb1400_gpio_set_direction(struct snd_ac97 *ac97, u16 gpio, in ucb1400_gpio_set_direction()
125 u16 dir) in ucb1400_gpio_set_direction()
137 static unsigned int ucb1400_adc_read(struct snd_ac97 *ac97, u16 adc_channel, in ucb1400_adc_read()
Dvt_buffer.h31 static inline void scr_memsetw(u16 *s, u16 c, unsigned int count) in scr_memsetw()
40 static inline void scr_memcpyw(u16 *d, const u16 *s, unsigned int count) in scr_memcpyw()
49 static inline void scr_memmovew(u16 *d, const u16 *s, unsigned int count) in scr_memmovew()
Dkernelcapi.h56 u16 applid;
77 u16 capi20_isinstalled(void);
78 u16 capi20_register(struct capi20_appl *ap);
79 u16 capi20_release(struct capi20_appl *ap);
80 u16 capi20_put_message(struct capi20_appl *ap, struct sk_buff *skb);
81 u16 capi20_get_manufacturer(u32 contr, u8 buf[CAPI_MANUFACTURER_LEN]);
82 u16 capi20_get_version(u32 contr, struct capi_version *verp);
83 u16 capi20_get_serial(u32 contr, u8 serial[CAPI_SERIAL_LEN]);
84 u16 capi20_get_profile(u32 contr, struct capi_profile *profp);
Dselection.h33 extern u16 screen_glyph(struct vc_data *vc, int offset);
40 extern u16 vcs_scr_readw(struct vc_data *vc, const u16 *org);
41 extern void vcs_scr_writew(struct vc_data *vc, u16 val, u16 *org);
Dsvga.h56 u16 m_min;
57 u16 m_max;
58 u16 n_min;
59 u16 n_max;
60 u16 r_min;
61 u16 r_max; /* r_max < 32 */
93 u16 flags; in svga_primary_device()
117 int svga_compute_pll(const struct svga_pll *pll, u32 f_wanted, u16 *m, u16 *n, u16 *r, int node);
Data.h529 static inline bool ata_id_has_hipm(const u16 *id) in ata_id_has_hipm()
531 u16 val = id[76]; in ata_id_has_hipm()
539 static inline bool ata_id_has_dipm(const u16 *id) in ata_id_has_dipm()
541 u16 val = id[78]; in ata_id_has_dipm()
550 static inline int ata_id_has_fua(const u16 *id) in ata_id_has_fua()
557 static inline int ata_id_has_flush(const u16 *id) in ata_id_has_flush()
564 static inline int ata_id_flush_enabled(const u16 *id) in ata_id_flush_enabled()
573 static inline int ata_id_has_flush_ext(const u16 *id) in ata_id_has_flush_ext()
580 static inline int ata_id_flush_ext_enabled(const u16 *id) in ata_id_flush_ext_enabled()
593 static inline int ata_id_has_lba48(const u16 *id) in ata_id_has_lba48()
[all …]
/include/media/
Dcx2341x.h37 u16 width;
38 u16 height;
39 u16 is_50hz;
44 u16 stream_insert_nav_packets;
54 u16 audio_properties;
55 u16 audio_mute;
60 u16 video_b_frames;
61 u16 video_gop_size;
62 u16 video_gop_closure;
66 u16 video_temporal_decimation;
[all …]
/include/video/
Duvesafb.h64 u16 horiz_total;
65 u16 horiz_start;
66 u16 horiz_end;
67 u16 vert_total;
68 u16 vert_start;
69 u16 vert_end;
72 u16 refresh_rate;
88 u16 mode_attr;
91 u16 win_granularity;
92 u16 win_size;
[all …]
Dmetronomefb.h17 u16 opcode;
18 u16 args[((64-2)/2)];
19 u16 csum;
27 u16 *metromem_img_csum;
28 u16 *csum_table;
/include/linux/isdn/
Dcapilli.h47 void (*register_appl)(struct capi_ctr *, u16 appl,
49 void (*release_appl)(struct capi_ctr *, u16 appl);
50 u16 (*send_message)(struct capi_ctr *, struct sk_buff *skb);
85 void capi_ctr_handle_message(struct capi_ctr * card, u16 appl, struct sk_buff *skb);
106 void capilib_new_ncci(struct list_head *head, u16 applid, u32 ncci, u32 winsize);
107 void capilib_free_ncci(struct list_head *head, u16 applid, u32 ncci);
108 void capilib_release_appl(struct list_head *head, u16 applid);
110 void capilib_data_b3_conf(struct list_head *head, u16 applid, u32 ncci, u16 msgid);
111 u16 capilib_data_b3_req(struct list_head *head, u16 applid, u32 ncci, u16 msgid);
/include/acpi/
Dactbl1.h133 u16 length;
157 u16 system_id;
194 u16 reserved2;
212 u16 parameter;
213 u16 boot_options;
214 u16 oem_parameters;
321 u16 type;
322 u16 length;
337 u16 reserved;
368 u16 segment;
[all …]
/include/asm-mn10300/
Dtimer-regs.h75 #define TM01MD __SYSREG(0xd4003000, u16) /* timer 0:1 mode register */
81 #define TM01BR __SYSREG(0xd4003010, u16) /* timer 0:1 base register */
87 #define TM01BC __SYSREGC(0xd4003020, u16) /* timer 0:1 binary counter */
189 #define TM4BR __SYSREG(0xd4003090, u16) /* timer 4 base register */
190 #define TM5BR __SYSREG(0xd4003092, u16) /* timer 5 base register */
191 #define TM7BR __SYSREG(0xd4003096, u16) /* timer 7 base register */
192 #define TM8BR __SYSREG(0xd4003098, u16) /* timer 8 base register */
193 #define TM9BR __SYSREG(0xd400309a, u16) /* timer 9 base register */
194 #define TM10BR __SYSREG(0xd400309c, u16) /* timer 10 base register */
195 #define TM11BR __SYSREG(0xd400309e, u16) /* timer 11 base register */
[all …]
Dcpu-regs.h87 #define CPUP __SYSREG(0xc0000020, u16) /* CPU pipeline register */
94 #define CPUM __SYSREG(0xc0000040, u16) /* CPU mode register */
119 #define DCR __SYSREG(0xc0000030, u16) /* Debug control register */
122 #define IVAR0 __SYSREG(0xc0000000, u16) /* interrupt vector 0 */
123 #define IVAR1 __SYSREG(0xc0000004, u16) /* interrupt vector 1 */
124 #define IVAR2 __SYSREG(0xc0000008, u16) /* interrupt vector 2 */
125 #define IVAR3 __SYSREG(0xc000000c, u16) /* interrupt vector 3 */
126 #define IVAR4 __SYSREG(0xc0000010, u16) /* interrupt vector 4 */
127 #define IVAR5 __SYSREG(0xc0000014, u16) /* interrupt vector 5 */
128 #define IVAR6 __SYSREG(0xc0000018, u16) /* interrupt vector 6 */
[all …]
Dintctl-regs.h19 #define GxICR(X) __SYSREG(0xd4000000 + (X) * 4, u16) /* group irq ctrl regs */
21 #define IAGR __SYSREG(0xd4000100, u16) /* intr acceptance group reg */
26 #define EXTMD __SYSREG(0xd4000200, u16) /* external pin intr spec reg */
31 u16 x = EXTMD; \
64 extern void set_intr_level(int irq, u16 level);
/include/linux/ssb/
Dssb.h32 u16 pa0b0;
33 u16 pa0b1;
34 u16 pa0b2;
35 u16 pa1b0;
36 u16 pa1b1;
37 u16 pa1b2;
42 u16 maxpwr_a; /* A-PHY Amplifier Max Power (in dBm Q5.2) */
43 u16 maxpwr_bg; /* B/G-PHY Amplifier Max Power (in dBm Q5.2) */
46 u16 boardflags_lo; /* Boardflags (low 16 bits) */
47 u16 boardflags_hi; /* Boardflags (high 16 bits) */
[all …]
/include/rdma/
Dib_cache.h70 u16 *index);
85 u16 *pkey);
100 u16 pkey,
101 u16 *index);
/include/linux/mfd/wm8350/
Dcore.h583 u16 readable; /* Mask of readable bits */
584 u16 writable; /* Mask of writable bits */
585 u16 vol; /* Mask of volatile bits */
588 extern const u16 wm8350_mode0_defaults[];
589 extern const u16 wm8350_mode1_defaults[];
590 extern const u16 wm8350_mode2_defaults[];
591 extern const u16 wm8350_mode3_defaults[];
592 extern const u16 wm8351_mode0_defaults[];
593 extern const u16 wm8351_mode1_defaults[];
594 extern const u16 wm8351_mode2_defaults[];
[all …]

12345678