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/include/scsi/
Dsas.h199 u8 fis_type; /* 0x34 */
200 u8 flags;
201 u8 status;
202 u8 error;
204 u8 lbal;
205 union { u8 lbam; u8 byte_count_low; };
206 union { u8 lbah; u8 byte_count_high; };
207 u8 device;
209 u8 lbal_exp;
210 u8 lbam_exp;
[all …]
Dsrp.h119 u8 opcode;
120 u8 reserved1[7];
123 u8 reserved2[4];
125 u8 req_flags;
126 u8 reserved3[5];
127 u8 initiator_port_id[16];
128 u8 target_port_id[16];
137 u8 opcode;
138 u8 reserved1[3];
144 u8 rsp_flags;
[all …]
Dscsi_eh.h20 u8 response_code; /* permit: 0x0, 0x70, 0x71, 0x72, 0x73 */
21 u8 sense_key;
22 u8 asc;
23 u8 ascq;
24 u8 byte4;
25 u8 byte5;
26 u8 byte6;
27 u8 additional_length; /* always 0 for fixed sense format */
45 extern int scsi_normalize_sense(const u8 *sense_buffer, int sb_len,
55 extern const u8 * scsi_sense_desc_find(const u8 * sense_buffer, int sb_len,
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/include/drm/
Ddrm_edid.h36 u8 t1;
37 u8 t2;
38 u8 mfg_rsvd;
42 u8 hsize; /* need to multiply by 8 then add 248 */
43 u8 vfreq:6; /* need to add 60 */
44 u8 aspect_ratio:2; /* 00=16:10, 01=4:3, 10=5:4, 11=16:9 */
49 u8 hactive_lo;
50 u8 hblank_lo;
51 u8 hblank_hi:4;
52 u8 hactive_hi:4;
[all …]
/include/net/
Ddcbnl.h28 u8 (*getstate)(struct net_device *);
29 u8 (*setstate)(struct net_device *, u8);
30 void (*getpermhwaddr)(struct net_device *, u8 *);
31 void (*setpgtccfgtx)(struct net_device *, int, u8, u8, u8, u8);
32 void (*setpgbwgcfgtx)(struct net_device *, int, u8);
33 void (*setpgtccfgrx)(struct net_device *, int, u8, u8, u8, u8);
34 void (*setpgbwgcfgrx)(struct net_device *, int, u8);
35 void (*getpgtccfgtx)(struct net_device *, int, u8 *, u8 *, u8 *, u8 *);
36 void (*getpgbwgcfgtx)(struct net_device *, int, u8 *);
37 void (*getpgtccfgrx)(struct net_device *, int, u8 *, u8 *, u8 *, u8 *);
[all …]
Dllc_conn.h36 u8 state; /* state of connection */
42 u8 retry_count; /* number of retries */
43 u8 ack_must_be_send;
44 u8 first_pdu_Ns;
45 u8 npta;
50 u8 vS; /* seq# next in-seq I-PDU tx'd*/
51 u8 vR; /* seq# next in-seq I-PDU rx'd*/
54 u8 k; /* tx window size; max = 127 */
55 u8 rw; /* rx window size; max = 127 */
56 u8 p_flag; /* state flags */
[all …]
Dllc_pdu.h117 #define LLC_2_SEQ_NBR_MODULO ((u8) 128)
120 #define LLC_I_GET_NS(pdu) (u8)((pdu->ctrl_1 & 0xFE) >> 1)
121 #define LLC_I_GET_NR(pdu) (u8)((pdu->ctrl_2 & 0xFE) >> 1)
157 info->rej_pdu_ctrl = ((*((u8 *) rej_ctrl) & \
160 (((u16) *((u8 *) rej_ctrl)) & 0x00FF))
167 #define FRMR_INFO_SET_Vs(info,vs) (info->curr_ssv = (((u8) vs) << 1))
168 #define FRMR_INFO_SET_Vr(info,vr) (info->curr_rsv = (((u8) vr) << 1))
174 #define FRMR_INFO_SET_C_R_BIT(info, cr) (info->curr_rsv |= (((u8) cr) & 0x01))
182 (info->ind_bits = ((info->ind_bits & 0xFE) | (((u8) ind) & 0x01)))
185 (info->ind_bits = ( (info->ind_bits & 0xFD) | (((u8) ind) & 0x02)))
[all …]
Dieee80211.h204 u8 dsap; /* always 0xAA */
205 u8 ssap; /* always 0xAA */
206 u8 ctrl; /* always 0x03 */
207 u8 oui[P80211_OUI_LEN]; /* organizational universal id */
307 u8 signal;
308 u8 noise;
310 u8 received_channel;
311 u8 control;
312 u8 mask;
313 u8 freq;
[all …]
/include/acpi/
Dacrestyp.h56 #define ACPI_READ_ONLY_MEMORY (u8) 0x00
57 #define ACPI_READ_WRITE_MEMORY (u8) 0x01
59 #define ACPI_NON_CACHEABLE_MEMORY (u8) 0x00
60 #define ACPI_CACHABLE_MEMORY (u8) 0x01
61 #define ACPI_WRITE_COMBINING_MEMORY (u8) 0x02
62 #define ACPI_PREFETCHABLE_MEMORY (u8) 0x03
69 #define ACPI_NON_ISA_ONLY_RANGES (u8) 0x01
70 #define ACPI_ISA_ONLY_RANGES (u8) 0x02
75 #define ACPI_SPARSE_TRANSLATION (u8) 0x01
80 #define ACPI_DECODE_10 (u8) 0x00 /* 10-bit IO address decode */
[all …]
Dactbl1.h100 u8 type;
101 u8 length;
107 u8 action;
108 u8 instruction;
109 u8 flags;
110 u8 reserved;
131 u8 type;
132 u8 reserved;
155 u8 min_reset_value;
156 u8 min_poll_interval;
[all …]
Dactbl.h89 u8 revision; /* ACPI Specification minor version # */
90 u8 checksum; /* To make sum of entire table == 0 */
106 u8 space_id; /* Address space where struct or register exists */
107 u8 bit_width; /* Size in bits of given register */
108 u8 bit_offset; /* Bit offset within the register */
109 u8 access_width; /* Minimum Access size (ACPI 3.0) */
121 u8 checksum; /* ACPI 1.0 checksum */
123 u8 revision; /* Must be (0) for ACPI 1.0 or (2) for ACPI 2.0+ */
127 u8 extended_checksum; /* Checksum of entire table (ACPI 2.0+) */
128 u8 reserved[3]; /* Reserved, must be zero */
[all …]
/include/rdma/
Dib_smi.h46 u8 base_version;
47 u8 mgmt_class;
48 u8 class_version;
49 u8 method;
51 u8 hop_ptr;
52 u8 hop_cnt;
60 u8 reserved[28];
61 u8 data[IB_SMP_DATA_SIZE];
62 u8 initial_path[IB_SMP_MAX_PATH_HOPS];
63 u8 return_path[IB_SMP_MAX_PATH_HOPS];
[all …]
Dib_cm.h112 u8 port;
123 u8 responder_resources;
124 u8 initiator_depth;
138 u8 responder_resources;
139 u8 initiator_depth;
186 u8 ari_length;
190 u8 service_timeout;
217 u8 info_len;
222 u8 port;
240 u8 info_len;
[all …]
/include/linux/usb/
Dwusb-wa.h90 u8 bLength;
91 u8 bDescriptorType;
96 u8 bHSHubAddress; /* reserved: 0 */
97 u8 bHSHubPort; /* ??? FIXME ??? */
98 u8 bSpeed; /* rw: xfer rate 'enum uwb_phy_rate' */
99 u8 bDeviceAddress; /* rw: Target device address */
100 u8 bEndpointAddress; /* rw: Target EP address */
101 u8 bDataSequence; /* ro: Current Data sequence */
103 u8 bMaxDataSequence; /* ro?: max supported seq */
104 u8 bInterval; /* rw: */
[all …]
Dmusb.h24 u8 bits;
41 u8 num_eps; /* number of endpoints _with_ ep0 */
42 u8 dma_channels; /* number of dma channels */
43 u8 dyn_fifo_size; /* dynamic size in bytes */
44 u8 vendor_ctrl; /* vendor control reg width */
45 u8 vendor_stat; /* vendor status reg witdh */
46 u8 dma_req_chan; /* bitmask for required dma channels */
47 u8 ram_bits; /* ram address size */
59 u8 mode;
68 u8 power;
[all …]
/include/linux/mmc/
Dmmc.h158 u8 csd_structure;
159 u8 spec_vers;
160 u8 taac;
161 u8 nsac;
162 u8 tran_speed;
164 u8 read_bl_len;
165 u8 read_bl_partial;
166 u8 write_blk_misalign;
167 u8 read_blk_misalign;
168 u8 dsr_imp;
[all …]
/include/video/
Duvesafb.h70 u8 flags;
73 u8 reserved[40];
89 u8 winA_attr;
90 u8 winB_attr;
101 u8 x_char_size;
102 u8 y_char_size;
103 u8 planes;
104 u8 bits_per_pixel;
105 u8 banks;
106 u8 memory_model;
[all …]
/include/sound/
Dwavefront.h74 typedef unsigned char u8; typedef
80 typedef u8 UCHAR8;
209 u8 attack_time:7;
210 u8 Unused1:1;
212 u8 decay1_time:7;
213 u8 Unused2:1;
215 u8 decay2_time:7;
216 u8 Unused3:1;
218 u8 sustain_time:7;
219 u8 Unused4:1;
[all …]
/include/net/bluetooth/
Drfcomm.h105 u8 addr;
106 u8 ctrl;
107 u8 len; // Actual size can be 2 bytes
111 u8 addr;
112 u8 ctrl;
113 u8 len;
114 u8 fcs;
118 u8 type;
119 u8 len;
123 u8 dlci;
[all …]
/include/asm-mn10300/unit-asb2303/
Dserial.h34 .iomem_base = (u8 *) SERIAL_PORT0_BASE_ADDRESS, \
42 .iomem_base = (u8 *) SERIAL_PORT1_BASE_ADDRESS, \
60 #define GDBPORT_SERIAL_RX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_RX * 4, u8)
61 #define GDBPORT_SERIAL_TX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_TX * 4, u8)
62 #define GDBPORT_SERIAL_DLL __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLL * 4, u8)
63 #define GDBPORT_SERIAL_DLM __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLM * 4, u8)
64 #define GDBPORT_SERIAL_IER __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IER * 4, u8)
65 #define GDBPORT_SERIAL_IIR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IIR * 4, u8)
66 #define GDBPORT_SERIAL_FCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_FCR * 4, u8)
67 #define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LCR * 4, u8)
[all …]
/include/asm-mn10300/
Drtc-regs.h18 #define RTSCR __SYSREG(0xd8600000, u8) /* RTC seconds count reg */
19 #define RTSAR __SYSREG(0xd8600001, u8) /* RTC seconds alarm reg */
20 #define RTMCR __SYSREG(0xd8600002, u8) /* RTC minutes count reg */
21 #define RTMAR __SYSREG(0xd8600003, u8) /* RTC minutes alarm reg */
22 #define RTHCR __SYSREG(0xd8600004, u8) /* RTC hours count reg */
23 #define RTHAR __SYSREG(0xd8600005, u8) /* RTC hours alarm reg */
24 #define RTDWCR __SYSREG(0xd8600006, u8) /* RTC day of the week count reg */
25 #define RTDMCR __SYSREG(0xd8600007, u8) /* RTC days count reg */
26 #define RTMTCR __SYSREG(0xd8600008, u8) /* RTC months count reg */
27 #define RTYCR __SYSREG(0xd8600009, u8) /* RTC years count reg */
[all …]
/include/linux/
Dcrc7.h5 extern const u8 crc7_syndrome_table[256];
7 static inline u8 crc7_byte(u8 crc, u8 data) in crc7_byte()
12 extern u8 crc7(u8 crc, const u8 *buffer, size_t len);
Dcycx_x25.h95 u8 link;
96 u8 speed;
97 u8 clock;
98 u8 n2;
99 u8 n2win;
100 u8 n3win;
101 u8 nvc;
102 u8 pktlen;
103 u8 locaddr;
104 u8 remaddr;
[all …]
/include/asm-mn10300/unit-asb2305/
Dserial.h19 #define ASB2305_DEBUG_MCR __SYSREG(0xA6FB0000 + UART_MCR * 2, u8)
33 .iomem_base = (u8 *) SERIAL_PORT0_BASE_ADDRESS, \
51 #define GDBPORT_SERIAL_RX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_RX * 4, u8)
52 #define GDBPORT_SERIAL_TX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_TX * 4, u8)
53 #define GDBPORT_SERIAL_DLL __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLL * 4, u8)
54 #define GDBPORT_SERIAL_DLM __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLM * 4, u8)
55 #define GDBPORT_SERIAL_IER __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IER * 4, u8)
56 #define GDBPORT_SERIAL_IIR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IIR * 4, u8)
57 #define GDBPORT_SERIAL_FCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_FCR * 4, u8)
58 #define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LCR * 4, u8)
[all …]
/include/net/iucv/
Diucv.h96 u8 flags;
120 u8 rmmsg[8];
121 u8 flags;
143 int (*path_pending)(struct iucv_path *, u8 ipvmid[8], u8 ipuser[16]);
150 void (*path_complete)(struct iucv_path *, u8 ipuser[16]);
158 void (*path_severed)(struct iucv_path *, u8 ipuser[16]);
165 void (*path_quiesced)(struct iucv_path *, u8 ipuser[16]);
171 void (*path_resumed)(struct iucv_path *, u8 ipuser[16]);
222 static inline struct iucv_path *iucv_path_alloc(u16 msglim, u8 flags, gfp_t gfp) in iucv_path_alloc()
258 u8 userdata[16], void *private);
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