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/arch/powerpc/boot/
D4xx.c520 u32 pllmr = mfdcr(DCRN_CPC0_PLLMR); in ibm405gp_fixup_clocks() local
527 fwdv = (8 - ((pllmr & 0xe0000000) >> 29)); in ibm405gp_fixup_clocks()
528 fbdv = (pllmr & 0x1e000000) >> 25; in ibm405gp_fixup_clocks()
531 cbdv = ((pllmr & 0x00060000) >> 17) + 1; /* CPU:PLB */ in ibm405gp_fixup_clocks()
532 opdv = ((pllmr & 0x00018000) >> 15) + 1; /* PLB:OPB */ in ibm405gp_fixup_clocks()
533 ppdv = ((pllmr & 0x00001800) >> 13) + 1; /* PLB:PCI */ in ibm405gp_fixup_clocks()
534 epdv = ((pllmr & 0x00001800) >> 11) + 2; /* PLB:EBC */ in ibm405gp_fixup_clocks()
539 fwdvb = 8 - (pllmr & 0x00000007); in ibm405gp_fixup_clocks()