1 /* 2 * arch/arm/mach-realview/include/mach/board-pb1176.h 3 * 4 * Copyright (C) 2008 ARM Limited 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 18 * MA 02110-1301, USA. 19 */ 20 21 #ifndef __ASM_ARCH_BOARD_PB1176_H 22 #define __ASM_ARCH_BOARD_PB1176_H 23 24 #include <mach/platform.h> 25 26 /* 27 * Peripheral addresses 28 */ 29 #define REALVIEW_PB1176_SCTL_BASE 0x10100000 /* System controller */ 30 #define REALVIEW_PB1176_SMC_BASE 0x10111000 /* SMC */ 31 #define REALVIEW_PB1176_DMC_BASE 0x10109000 /* DMC configuration */ 32 #define REALVIEW_PB1176_SDRAM67_BASE 0x70000000 /* SDRAM banks 6 and 7 */ 33 #define REALVIEW_PB1176_FLASH_BASE 0x30000000 34 #define REALVIEW_PB1176_FLASH_SIZE SZ_64M 35 36 #define REALVIEW_PB1176_TIMER0_1_BASE 0x10104000 /* Timer 0 and 1 */ 37 #define REALVIEW_PB1176_TIMER2_3_BASE 0x10105000 /* Timer 2 and 3 */ 38 #define REALVIEW_PB1176_TIMER4_5_BASE 0x10106000 /* Timer 4 and 5 */ 39 #define REALVIEW_PB1176_WATCHDOG_BASE 0x10107000 /* watchdog interface */ 40 #define REALVIEW_PB1176_RTC_BASE 0x10108000 /* Real Time Clock */ 41 #define REALVIEW_PB1176_GPIO0_BASE 0x1010A000 /* GPIO port 0 */ 42 #define REALVIEW_PB1176_SSP_BASE 0x1010B000 /* Synchronous Serial Port */ 43 #define REALVIEW_PB1176_UART0_BASE 0x1010C000 /* UART 0 */ 44 #define REALVIEW_PB1176_UART1_BASE 0x1010D000 /* UART 1 */ 45 #define REALVIEW_PB1176_UART2_BASE 0x1010E000 /* UART 2 */ 46 #define REALVIEW_PB1176_UART3_BASE 0x1010F000 /* UART 3 */ 47 #define REALVIEW_PB1176_CLCD_BASE 0x10112000 /* CLCD */ 48 #define REALVIEW_PB1176_ETH_BASE 0x3A000000 /* Ethernet */ 49 #define REALVIEW_PB1176_USB_BASE 0x3B000000 /* USB */ 50 51 /* 52 * PCI regions 53 */ 54 #define REALVIEW_PB1176_PCI_BASE 0x60000000 /* PCI self config */ 55 #define REALVIEW_PB1176_PCI_CFG_BASE 0x61000000 /* PCI config */ 56 #define REALVIEW_PB1176_PCI_IO_BASE0 0x62000000 /* PCI IO region */ 57 #define REALVIEW_PB1176_PCI_MEM_BASE0 0x63000000 /* Memory region 1 */ 58 #define REALVIEW_PB1176_PCI_MEM_BASE1 0x64000000 /* Memory region 2 */ 59 #define REALVIEW_PB1176_PCI_MEM_BASE2 0x68000000 /* Memory region 3 */ 60 61 #define REALVIEW_PB1176_PCI_BASE_SIZE 0x01000000 /* 16MB */ 62 #define REALVIEW_PB1176_PCI_CFG_BASE_SIZE 0x01000000 /* 16MB */ 63 #define REALVIEW_PB1176_PCI_IO_BASE0_SIZE 0x01000000 /* 16MB */ 64 #define REALVIEW_PB1176_PCI_MEM_BASE0_SIZE 0x01000000 /* 16MB */ 65 #define REALVIEW_PB1176_PCI_MEM_BASE1_SIZE 0x04000000 /* 64MB */ 66 #define REALVIEW_PB1176_PCI_MEM_BASE2_SIZE 0x08000000 /* 128MB */ 67 68 #define REALVIEW_DC1176_GIC_CPU_BASE 0x10120000 /* GIC CPU interface, on devchip */ 69 #define REALVIEW_DC1176_GIC_DIST_BASE 0x10121000 /* GIC distributor, on devchip */ 70 #define REALVIEW_PB1176_GIC_CPU_BASE 0x10040000 /* GIC CPU interface, on FPGA */ 71 #define REALVIEW_PB1176_GIC_DIST_BASE 0x10041000 /* GIC distributor, on FPGA */ 72 #define REALVIEW_PB1176_L220_BASE 0x10110000 /* L220 registers */ 73 74 /* 75 * Irqs 76 */ 77 #define IRQ_DC1176_GIC_START 32 78 #define IRQ_PB1176_GIC_START 64 79 80 /* 81 * ARM1176 DevChip interrupt sources (primary GIC) 82 */ 83 #define IRQ_DC1176_WATCHDOG (IRQ_DC1176_GIC_START + 0) /* Watchdog timer */ 84 #define IRQ_DC1176_SOFTINT (IRQ_DC1176_GIC_START + 1) /* Software interrupt */ 85 #define IRQ_DC1176_COMMRx (IRQ_DC1176_GIC_START + 2) /* Debug Comm Rx interrupt */ 86 #define IRQ_DC1176_COMMTx (IRQ_DC1176_GIC_START + 3) /* Debug Comm Tx interrupt */ 87 #define IRQ_DC1176_TIMER0 (IRQ_DC1176_GIC_START + 8) /* Timer 0 */ 88 #define IRQ_DC1176_TIMER1 (IRQ_DC1176_GIC_START + 9) /* Timer 1 */ 89 #define IRQ_DC1176_TIMER2 (IRQ_DC1176_GIC_START + 10) /* Timer 2 */ 90 #define IRQ_DC1176_APC (IRQ_DC1176_GIC_START + 11) 91 #define IRQ_DC1176_IEC (IRQ_DC1176_GIC_START + 12) 92 #define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13) 93 #define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14) 94 #define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */ 95 #define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */ 96 #define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */ 97 #define IRQ_DC1176_UART2 (IRQ_DC1176_GIC_START + 20) /* UART 2 on development chip */ 98 #define IRQ_DC1176_UART3 (IRQ_DC1176_GIC_START + 21) /* UART 3 on development chip */ 99 100 #define IRQ_DC1176_PB_IRQ2 (IRQ_DC1176_GIC_START + 30) /* tile GIC */ 101 #define IRQ_DC1176_PB_IRQ1 (IRQ_DC1176_GIC_START + 31) /* main GIC */ 102 103 /* 104 * RealView PB1176 interrupt sources (secondary GIC) 105 */ 106 #define IRQ_PB1176_MMCI0A (IRQ_PB1176_GIC_START + 1) /* Multimedia Card 0A */ 107 #define IRQ_PB1176_MMCI0B (IRQ_PB1176_GIC_START + 2) /* Multimedia Card 0A */ 108 #define IRQ_PB1176_KMI0 (IRQ_PB1176_GIC_START + 3) /* Keyboard/Mouse port 0 */ 109 #define IRQ_PB1176_KMI1 (IRQ_PB1176_GIC_START + 4) /* Keyboard/Mouse port 1 */ 110 #define IRQ_PB1176_SCI (IRQ_PB1176_GIC_START + 5) 111 #define IRQ_PB1176_UART4 (IRQ_PB1176_GIC_START + 6) /* UART 4 on baseboard */ 112 #define IRQ_PB1176_CHARLCD (IRQ_PB1176_GIC_START + 7) /* Character LCD */ 113 #define IRQ_PB1176_GPIO1 (IRQ_PB1176_GIC_START + 8) 114 #define IRQ_PB1176_GPIO2 (IRQ_PB1176_GIC_START + 9) 115 #define IRQ_PB1176_ETH (IRQ_PB1176_GIC_START + 10) /* Ethernet controller */ 116 #define IRQ_PB1176_USB (IRQ_PB1176_GIC_START + 11) /* USB controller */ 117 118 #define IRQ_PB1176_PISMO (IRQ_PB1176_GIC_START + 16) 119 120 #define IRQ_PB1176_AACI (IRQ_PB1176_GIC_START + 19) /* Audio Codec */ 121 122 #define IRQ_PB1176_TIMER0_1 (IRQ_PB1176_GIC_START + 22) 123 #define IRQ_PB1176_TIMER2_3 (IRQ_PB1176_GIC_START + 23) 124 #define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */ 125 #define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */ 126 127 #define IRQ_PB1176_GPIO0 -1 128 #define IRQ_PB1176_SSP -1 129 #define IRQ_PB1176_SCTL -1 130 131 #define NR_GIC_PB1176 2 132 133 /* 134 * Only define NR_IRQS if less than NR_IRQS_PB1176 135 */ 136 #define NR_IRQS_PB1176 (IRQ_DC1176_GIC_START + 96) 137 138 #if defined(CONFIG_MACH_REALVIEW_PB1176) 139 140 #if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PB1176) 141 #undef NR_IRQS 142 #define NR_IRQS NR_IRQS_PB1176 143 #endif 144 145 #if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PB1176) 146 #undef MAX_GIC_NR 147 #define MAX_GIC_NR NR_GIC_PB1176 148 #endif 149 150 #endif /* CONFIG_MACH_REALVIEW_PB1176 */ 151 152 #endif /* __ASM_ARCH_BOARD_PB1176_H */ 153