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1 /*
2  * Copyright (c) 2006 Chelsio, Inc. All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  */
32 #ifndef __IWCH_H__
33 #define __IWCH_H__
34 
35 #include <linux/mutex.h>
36 #include <linux/list.h>
37 #include <linux/spinlock.h>
38 #include <linux/idr.h>
39 
40 #include <rdma/ib_verbs.h>
41 
42 #include "cxio_hal.h"
43 #include "cxgb3_offload.h"
44 
45 struct iwch_pd;
46 struct iwch_cq;
47 struct iwch_qp;
48 struct iwch_mr;
49 
50 struct iwch_rnic_attributes {
51 	u32 max_qps;
52 	u32 max_wrs;				/* Max for any SQ/RQ */
53 	u32 max_sge_per_wr;
54 	u32 max_sge_per_rdma_write_wr;	/* for RDMA Write WR */
55 	u32 max_cqs;
56 	u32 max_cqes_per_cq;
57 	u32 max_mem_regs;
58 	u32 max_phys_buf_entries;		/* for phys buf list */
59 	u32 max_pds;
60 
61 	/*
62 	 * The memory page sizes supported by this RNIC.
63 	 * Bit position i in bitmap indicates page of
64 	 * size (4k)^i.  Phys block list mode unsupported.
65 	 */
66 	u32 mem_pgsizes_bitmask;
67 	u64 max_mr_size;
68 	u8 can_resize_wq;
69 
70 	/*
71 	 * The maximum number of RDMA Reads that can be outstanding
72 	 * per QP with this RNIC as the target.
73 	 */
74 	u32 max_rdma_reads_per_qp;
75 
76 	/*
77 	 * The maximum number of resources used for RDMA Reads
78 	 * by this RNIC with this RNIC as the target.
79 	 */
80 	u32 max_rdma_read_resources;
81 
82 	/*
83 	 * The max depth per QP for initiation of RDMA Read
84 	 * by this RNIC.
85 	 */
86 	u32 max_rdma_read_qp_depth;
87 
88 	/*
89 	 * The maximum depth for initiation of RDMA Read
90 	 * operations by this RNIC on all QPs
91 	 */
92 	u32 max_rdma_read_depth;
93 	u8 rq_overflow_handled;
94 	u32 can_modify_ird;
95 	u32 can_modify_ord;
96 	u32 max_mem_windows;
97 	u32 stag0_value;
98 	u8 zbva_support;
99 	u8 local_invalidate_fence;
100 	u32 cq_overflow_detection;
101 };
102 
103 struct iwch_dev {
104 	struct ib_device ibdev;
105 	struct cxio_rdev rdev;
106 	u32 device_cap_flags;
107 	struct iwch_rnic_attributes attr;
108 	struct idr cqidr;
109 	struct idr qpidr;
110 	struct idr mmidr;
111 	spinlock_t lock;
112 	struct list_head entry;
113 };
114 
to_iwch_dev(struct ib_device * ibdev)115 static inline struct iwch_dev *to_iwch_dev(struct ib_device *ibdev)
116 {
117 	return container_of(ibdev, struct iwch_dev, ibdev);
118 }
119 
t3b_device(const struct iwch_dev * rhp)120 static inline int t3b_device(const struct iwch_dev *rhp)
121 {
122 	return rhp->rdev.t3cdev_p->type == T3B;
123 }
124 
t3a_device(const struct iwch_dev * rhp)125 static inline int t3a_device(const struct iwch_dev *rhp)
126 {
127 	return rhp->rdev.t3cdev_p->type == T3A;
128 }
129 
get_chp(struct iwch_dev * rhp,u32 cqid)130 static inline struct iwch_cq *get_chp(struct iwch_dev *rhp, u32 cqid)
131 {
132 	return idr_find(&rhp->cqidr, cqid);
133 }
134 
get_qhp(struct iwch_dev * rhp,u32 qpid)135 static inline struct iwch_qp *get_qhp(struct iwch_dev *rhp, u32 qpid)
136 {
137 	return idr_find(&rhp->qpidr, qpid);
138 }
139 
get_mhp(struct iwch_dev * rhp,u32 mmid)140 static inline struct iwch_mr *get_mhp(struct iwch_dev *rhp, u32 mmid)
141 {
142 	return idr_find(&rhp->mmidr, mmid);
143 }
144 
insert_handle(struct iwch_dev * rhp,struct idr * idr,void * handle,u32 id)145 static inline int insert_handle(struct iwch_dev *rhp, struct idr *idr,
146 				void *handle, u32 id)
147 {
148 	int ret;
149 	int newid;
150 
151 	do {
152 		if (!idr_pre_get(idr, GFP_KERNEL)) {
153 			return -ENOMEM;
154 		}
155 		spin_lock_irq(&rhp->lock);
156 		ret = idr_get_new_above(idr, handle, id, &newid);
157 		BUG_ON(newid != id);
158 		spin_unlock_irq(&rhp->lock);
159 	} while (ret == -EAGAIN);
160 
161 	return ret;
162 }
163 
remove_handle(struct iwch_dev * rhp,struct idr * idr,u32 id)164 static inline void remove_handle(struct iwch_dev *rhp, struct idr *idr, u32 id)
165 {
166 	spin_lock_irq(&rhp->lock);
167 	idr_remove(idr, id);
168 	spin_unlock_irq(&rhp->lock);
169 }
170 
171 extern struct cxgb3_client t3c_client;
172 extern cxgb3_cpl_handler_func t3c_handlers[NUM_CPL_CMDS];
173 extern void iwch_ev_dispatch(struct cxio_rdev *rdev_p, struct sk_buff *skb);
174 
175 #endif
176