Lines Matching refs:IRQ_TC11MP_GIC_START
529 #define IRQ_TC11MP_GIC_START 32 macro
531 #define IRQ_CNS3XXX_PMU (IRQ_TC11MP_GIC_START + 0)
532 #define IRQ_CNS3XXX_SDIO (IRQ_TC11MP_GIC_START + 1)
533 #define IRQ_CNS3XXX_L2CC (IRQ_TC11MP_GIC_START + 2)
534 #define IRQ_CNS3XXX_RTC (IRQ_TC11MP_GIC_START + 3)
535 #define IRQ_CNS3XXX_I2S (IRQ_TC11MP_GIC_START + 4)
536 #define IRQ_CNS3XXX_PCM (IRQ_TC11MP_GIC_START + 5)
537 #define IRQ_CNS3XXX_SPI (IRQ_TC11MP_GIC_START + 6)
538 #define IRQ_CNS3XXX_I2C (IRQ_TC11MP_GIC_START + 7)
539 #define IRQ_CNS3XXX_CIM (IRQ_TC11MP_GIC_START + 8)
540 #define IRQ_CNS3XXX_GPU (IRQ_TC11MP_GIC_START + 9)
541 #define IRQ_CNS3XXX_LCD (IRQ_TC11MP_GIC_START + 10)
542 #define IRQ_CNS3XXX_GPIOA (IRQ_TC11MP_GIC_START + 11)
543 #define IRQ_CNS3XXX_GPIOB (IRQ_TC11MP_GIC_START + 12)
544 #define IRQ_CNS3XXX_UART0 (IRQ_TC11MP_GIC_START + 13)
545 #define IRQ_CNS3XXX_UART1 (IRQ_TC11MP_GIC_START + 14)
546 #define IRQ_CNS3XXX_UART2 (IRQ_TC11MP_GIC_START + 15)
547 #define IRQ_CNS3XXX_ARM11 (IRQ_TC11MP_GIC_START + 16)
549 #define IRQ_CNS3XXX_SW_STATUS (IRQ_TC11MP_GIC_START + 17)
550 #define IRQ_CNS3XXX_SW_R0TXC (IRQ_TC11MP_GIC_START + 18)
551 #define IRQ_CNS3XXX_SW_R0RXC (IRQ_TC11MP_GIC_START + 19)
552 #define IRQ_CNS3XXX_SW_R0QE (IRQ_TC11MP_GIC_START + 20)
553 #define IRQ_CNS3XXX_SW_R0QF (IRQ_TC11MP_GIC_START + 21)
554 #define IRQ_CNS3XXX_SW_R1TXC (IRQ_TC11MP_GIC_START + 22)
555 #define IRQ_CNS3XXX_SW_R1RXC (IRQ_TC11MP_GIC_START + 23)
556 #define IRQ_CNS3XXX_SW_R1QE (IRQ_TC11MP_GIC_START + 24)
557 #define IRQ_CNS3XXX_SW_R1QF (IRQ_TC11MP_GIC_START + 25)
558 #define IRQ_CNS3XXX_SW_PPE (IRQ_TC11MP_GIC_START + 26)
560 #define IRQ_CNS3XXX_CRYPTO (IRQ_TC11MP_GIC_START + 27)
561 #define IRQ_CNS3XXX_HCIE (IRQ_TC11MP_GIC_START + 28)
562 #define IRQ_CNS3XXX_PCIE0_DEVICE (IRQ_TC11MP_GIC_START + 29)
563 #define IRQ_CNS3XXX_PCIE1_DEVICE (IRQ_TC11MP_GIC_START + 30)
564 #define IRQ_CNS3XXX_USB_OTG (IRQ_TC11MP_GIC_START + 31)
565 #define IRQ_CNS3XXX_USB_EHCI (IRQ_TC11MP_GIC_START + 32)
566 #define IRQ_CNS3XXX_SATA (IRQ_TC11MP_GIC_START + 33)
567 #define IRQ_CNS3XXX_RAID (IRQ_TC11MP_GIC_START + 34)
568 #define IRQ_CNS3XXX_SMC (IRQ_TC11MP_GIC_START + 35)
570 #define IRQ_CNS3XXX_DMAC_ABORT (IRQ_TC11MP_GIC_START + 36)
571 #define IRQ_CNS3XXX_DMAC0 (IRQ_TC11MP_GIC_START + 37)
572 #define IRQ_CNS3XXX_DMAC1 (IRQ_TC11MP_GIC_START + 38)
573 #define IRQ_CNS3XXX_DMAC2 (IRQ_TC11MP_GIC_START + 39)
574 #define IRQ_CNS3XXX_DMAC3 (IRQ_TC11MP_GIC_START + 40)
575 #define IRQ_CNS3XXX_DMAC4 (IRQ_TC11MP_GIC_START + 41)
576 #define IRQ_CNS3XXX_DMAC5 (IRQ_TC11MP_GIC_START + 42)
577 #define IRQ_CNS3XXX_DMAC6 (IRQ_TC11MP_GIC_START + 43)
578 #define IRQ_CNS3XXX_DMAC7 (IRQ_TC11MP_GIC_START + 44)
579 #define IRQ_CNS3XXX_DMAC8 (IRQ_TC11MP_GIC_START + 45)
580 #define IRQ_CNS3XXX_DMAC9 (IRQ_TC11MP_GIC_START + 46)
581 #define IRQ_CNS3XXX_DMAC10 (IRQ_TC11MP_GIC_START + 47)
582 #define IRQ_CNS3XXX_DMAC11 (IRQ_TC11MP_GIC_START + 48)
583 #define IRQ_CNS3XXX_DMAC12 (IRQ_TC11MP_GIC_START + 49)
584 #define IRQ_CNS3XXX_DMAC13 (IRQ_TC11MP_GIC_START + 50)
585 #define IRQ_CNS3XXX_DMAC14 (IRQ_TC11MP_GIC_START + 51)
586 #define IRQ_CNS3XXX_DMAC15 (IRQ_TC11MP_GIC_START + 52)
587 #define IRQ_CNS3XXX_DMAC16 (IRQ_TC11MP_GIC_START + 53)
588 #define IRQ_CNS3XXX_DMAC17 (IRQ_TC11MP_GIC_START + 54)
590 #define IRQ_CNS3XXX_PCIE0_RC (IRQ_TC11MP_GIC_START + 55)
591 #define IRQ_CNS3XXX_PCIE1_RC (IRQ_TC11MP_GIC_START + 56)
592 #define IRQ_CNS3XXX_TIMER0 (IRQ_TC11MP_GIC_START + 57)
593 #define IRQ_CNS3XXX_TIMER1 (IRQ_TC11MP_GIC_START + 58)
594 #define IRQ_CNS3XXX_USB_OHCI (IRQ_TC11MP_GIC_START + 59)
595 #define IRQ_CNS3XXX_TIMER2 (IRQ_TC11MP_GIC_START + 60)
596 #define IRQ_CNS3XXX_EXTERNAL_PIN0 (IRQ_TC11MP_GIC_START + 61)
597 #define IRQ_CNS3XXX_EXTERNAL_PIN1 (IRQ_TC11MP_GIC_START + 62)
598 #define IRQ_CNS3XXX_EXTERNAL_PIN2 (IRQ_TC11MP_GIC_START + 63)
600 #define NR_IRQS_CNS3XXX (IRQ_TC11MP_GIC_START + 64)