55         case 0: w0(1); P1; w0(r); P2; w0(0); P1;   in on26_read_regr()
61         case 1: w0(1); P1; w0(r); P2; w0(0); P1;  in on26_read_regr()
85         case 1: w0(1); P1; w0(r); P2; w0(0); P1;  in on26_write_regr()
86 		w0(val); P2; w0(val); P2;  in on26_write_regr()
99 #define  CCP(x)  w0(0xfe);w0(0xaa);w0(0x55);w0(0);w0(0xff);\
100 		 w0(0x87);w0(0x78);w0(x);w2(4);w2(5);w2(4);w0(0xff);
112 	w0(2); P1; w0(8); P2;  in on26_connect()
113 	w0(2); P1; w0(x); P2;  in on26_connect()
119 	              else { w0(4); P1; w0(4); P1; }  in on26_disconnect()
121         w0(pi->saved_r0);  in on26_disconnect()
143         w0(0xfe);w0(0xaa);w0(0x55);w0(0);w0(0xff);  in on26_test_port()
144         i = ((r1() & 0xf0) << 4); w0(0x87);  in on26_test_port()
145         i |= (r1() & 0xf0); w0(0x78);  in on26_test_port()
146         w0(0x20);w2(4);w2(5);  in on26_test_port()
148         w2(4);w0(0xff);  in on26_test_port()
152             w0(2); P1; w0(0);   P2;  in on26_test_port()
153             w0(3); P1; w0(0);   P2;  in on26_test_port()
154             w0(2); P1; w0(8);   P2; udelay(100);  in on26_test_port()
155             w0(2); P1; w0(0xa); P2; udelay(100);  in on26_test_port()
156             w0(2); P1; w0(8);   P2; udelay(1000);  in on26_test_port()
172             w0(4); P1; w0(4); P1;  in on26_test_port()
179         w0(pi->saved_r0);  in on26_test_port()
192         case 0: w0(1); P1; w0(1); P2; w0(2); P1; w0(0x18); P2; w0(0); P1;  in on26_read_block()
199 		w0(2); P1; w0(8); P2;   in on26_read_block()
202         case 1: w0(1); P1; w0(1); P2; w0(2); P1; w0(0x19); P2; w0(0); P1;  in on26_read_block()
208                 w0(2); P1; w0(9); P2;  in on26_read_block()
242         case 1: w0(1); P1; w0(1); P2;   in on26_write_block()
243 		w0(2); P1; w0(0x18+pi->mode); P2; w0(0); P1;  in on26_write_block()
246                         w2(5); w0(buf[2*k]);   in on26_write_block()
247 			w2(7); w0(buf[2*k+1]);  in on26_write_block()
250 		w0(2); P1; w0(8+pi->mode); P2;  in on26_write_block()