• Home
  • Raw
  • Download

Lines Matching refs:fixed_rate

478 		if (rate != pll->fixed_rate) {  in clk_pll_set_rate()
481 pll->fixed_rate, rate); in clk_pll_set_rate()
513 return pll->fixed_rate; in clk_pll_round_rate()
546 if (_get_table_rate(hw, &sel, pll->fixed_rate, parent_rate)) { in clk_pll_recalc_rate()
551 return pll->fixed_rate; in clk_pll_recalc_rate()
629 if (_get_table_rate(hw, &sel, pll->fixed_rate, input_rate)) in clk_plle_enable()
1149 if (_get_table_rate(hw, &sel, pll->fixed_rate, input_rate)) in clk_plle_tegra114_enable()
1224 void __iomem *pmc, unsigned long fixed_rate, in _tegra_init_pll() argument
1239 pll->fixed_rate = fixed_rate; in _tegra_init_pll()
1273 unsigned long flags, unsigned long fixed_rate, in tegra_clk_register_pll() argument
1282 pll = _tegra_init_pll(clk_base, pmc, fixed_rate, pll_params, pll_flags, in tegra_clk_register_pll()
1297 unsigned long flags, unsigned long fixed_rate, in tegra_clk_register_plle() argument
1306 pll = _tegra_init_pll(clk_base, pmc, fixed_rate, pll_params, pll_flags, in tegra_clk_register_plle()
1366 unsigned long flags, unsigned long fixed_rate, in tegra_clk_register_pllxc() argument
1379 pll = _tegra_init_pll(clk_base, pmc, fixed_rate, pll_params, pll_flags, in tegra_clk_register_pllxc()
1394 unsigned long flags, unsigned long fixed_rate, in tegra_clk_register_pllre() argument
1405 pll = _tegra_init_pll(clk_base, pmc, fixed_rate, pll_params, pll_flags, in tegra_clk_register_pllre()
1442 unsigned long flags, unsigned long fixed_rate, in tegra_clk_register_pllm() argument
1456 pll = _tegra_init_pll(clk_base, pmc, fixed_rate, pll_params, pll_flags, in tegra_clk_register_pllm()
1471 unsigned long flags, unsigned long fixed_rate, in tegra_clk_register_pllc() argument
1494 pll = _tegra_init_pll(clk_base, pmc, fixed_rate, pll_params, pll_flags, in tegra_clk_register_pllc()
1547 unsigned long fixed_rate, in tegra_clk_register_plle_tegra114() argument
1556 pll = _tegra_init_pll(clk_base, NULL, fixed_rate, pll_params, in tegra_clk_register_plle_tegra114()