1225 		struct tegra_clk_pll_params *pll_params, u32 pll_flags,  in _tegra_init_pll()  argument
1240 	pll->flags = pll_flags;  in _tegra_init_pll()
1274 		struct tegra_clk_pll_params *pll_params, u32 pll_flags,  in tegra_clk_register_pll()  argument
1280 	pll_flags |= TEGRA_PLL_BYPASS;  in tegra_clk_register_pll()
1281 	pll_flags |= TEGRA_PLL_HAS_LOCK_ENABLE;  in tegra_clk_register_pll()
1282 	pll = _tegra_init_pll(clk_base, pmc, fixed_rate, pll_params, pll_flags,  in tegra_clk_register_pll()
1298 		struct tegra_clk_pll_params *pll_params, u32 pll_flags,  in tegra_clk_register_plle()  argument
1304 	pll_flags |= TEGRA_PLL_LOCK_MISC | TEGRA_PLL_BYPASS;  in tegra_clk_register_plle()
1305 	pll_flags |= TEGRA_PLL_HAS_LOCK_ENABLE;  in tegra_clk_register_plle()
1306 	pll = _tegra_init_pll(clk_base, pmc, fixed_rate, pll_params, pll_flags,  in tegra_clk_register_plle()
1368 			  u32 pll_flags,  in tegra_clk_register_pllxc()  argument
1378 	pll_flags |= TEGRA_PLL_HAS_LOCK_ENABLE;  in tegra_clk_register_pllxc()
1379 	pll = _tegra_init_pll(clk_base, pmc, fixed_rate, pll_params, pll_flags,  in tegra_clk_register_pllxc()
1396 			  u32 pll_flags,  in tegra_clk_register_pllre()  argument
1404 	pll_flags |= TEGRA_PLL_HAS_LOCK_ENABLE;  in tegra_clk_register_pllre()
1405 	pll = _tegra_init_pll(clk_base, pmc, fixed_rate, pll_params, pll_flags,  in tegra_clk_register_pllre()
1431 	pll_flags |= TEGRA_PLL_LOCK_MISC;  in tegra_clk_register_pllre()
1444 			  u32 pll_flags,  in tegra_clk_register_pllm()  argument
1454 	pll_flags |= TEGRA_PLL_BYPASS;  in tegra_clk_register_pllm()
1455 	pll_flags |= TEGRA_PLL_HAS_LOCK_ENABLE;  in tegra_clk_register_pllm()
1456 	pll = _tegra_init_pll(clk_base, pmc, fixed_rate, pll_params, pll_flags,  in tegra_clk_register_pllm()
1473 			  u32 pll_flags,  in tegra_clk_register_pllc()  argument
1493 	pll_flags |= TEGRA_PLL_BYPASS;  in tegra_clk_register_pllc()
1494 	pll = _tegra_init_pll(clk_base, pmc, fixed_rate, pll_params, pll_flags,  in tegra_clk_register_pllc()