Lines Matching refs:base_addr
72 void __iomem *base_addr; member
108 ctrl_reg = __raw_readl(timer->base_addr + TTC_CNT_CNTRL_OFFSET); in ttc_set_interval()
110 __raw_writel(ctrl_reg, timer->base_addr + TTC_CNT_CNTRL_OFFSET); in ttc_set_interval()
112 __raw_writel(cycles, timer->base_addr + TTC_INTR_VAL_OFFSET); in ttc_set_interval()
120 __raw_writel(ctrl_reg, timer->base_addr + TTC_CNT_CNTRL_OFFSET); in ttc_set_interval()
137 __raw_readl(timer->base_addr + TTC_ISR_OFFSET); in ttc_clock_event_interrupt()
153 return (cycle_t)__raw_readl(timer->base_addr + in __ttc_clocksource_read()
197 ctrl_reg = __raw_readl(timer->base_addr + in ttc_set_mode()
201 timer->base_addr + TTC_CNT_CNTRL_OFFSET); in ttc_set_mode()
204 ctrl_reg = __raw_readl(timer->base_addr + in ttc_set_mode()
208 timer->base_addr + TTC_CNT_CNTRL_OFFSET); in ttc_set_mode()
274 ttccs->ttc.base_addr = base; in ttc_setup_clocksource()
286 __raw_writel(0x0, ttccs->ttc.base_addr + TTC_IER_OFFSET); in ttc_setup_clocksource()
288 ttccs->ttc.base_addr + TTC_CLK_CNTRL_OFFSET); in ttc_setup_clocksource()
290 ttccs->ttc.base_addr + TTC_CNT_CNTRL_OFFSET); in ttc_setup_clocksource()
358 ttcce->ttc.base_addr = base; in ttc_setup_clockevent()
372 __raw_writel(0x23, ttcce->ttc.base_addr + TTC_CNT_CNTRL_OFFSET); in ttc_setup_clockevent()
374 ttcce->ttc.base_addr + TTC_CLK_CNTRL_OFFSET); in ttc_setup_clockevent()
375 __raw_writel(0x1, ttcce->ttc.base_addr + TTC_IER_OFFSET); in ttc_setup_clockevent()