Lines Matching refs:ioatdca
144 struct ioat_dca_priv *ioatdca = dca_priv(dca); in ioat_dca_add_requester() local
155 if (ioatdca->requester_count == ioatdca->max_requesters) in ioat_dca_add_requester()
158 for (i = 0; i < ioatdca->max_requesters; i++) { in ioat_dca_add_requester()
159 if (ioatdca->req_slots[i].pdev == NULL) { in ioat_dca_add_requester()
161 ioatdca->requester_count++; in ioat_dca_add_requester()
162 ioatdca->req_slots[i].pdev = pdev; in ioat_dca_add_requester()
163 ioatdca->req_slots[i].rid = id; in ioat_dca_add_requester()
164 writew(id, ioatdca->dca_base + (i * 4)); in ioat_dca_add_requester()
166 writeb(0, ioatdca->dca_base + (i * 4) + 2); in ioat_dca_add_requester()
177 struct ioat_dca_priv *ioatdca = dca_priv(dca); in ioat_dca_remove_requester() local
186 for (i = 0; i < ioatdca->max_requesters; i++) { in ioat_dca_remove_requester()
187 if (ioatdca->req_slots[i].pdev == pdev) { in ioat_dca_remove_requester()
188 writew(0, ioatdca->dca_base + (i * 4)); in ioat_dca_remove_requester()
189 ioatdca->req_slots[i].pdev = NULL; in ioat_dca_remove_requester()
190 ioatdca->req_slots[i].rid = 0; in ioat_dca_remove_requester()
191 ioatdca->requester_count--; in ioat_dca_remove_requester()
202 struct ioat_dca_priv *ioatdca = dca_priv(dca); in ioat_dca_get_tag() local
210 entry = ioatdca->tag_map[i]; in ioat_dca_get_tag()
225 struct ioat_dca_priv *ioatdca = dca_priv(dca); in ioat_dca_dev_managed() local
230 for (i = 0; i < ioatdca->max_requesters; i++) { in ioat_dca_dev_managed()
231 if (ioatdca->req_slots[i].pdev == pdev) in ioat_dca_dev_managed()
248 struct ioat_dca_priv *ioatdca; in ioat_dca_init() local
291 sizeof(*ioatdca) + in ioat_dca_init()
296 ioatdca = dca_priv(dca); in ioat_dca_init()
297 ioatdca->max_requesters = max_requesters; in ioat_dca_init()
298 ioatdca->dca_base = iobase + 0x54; in ioat_dca_init()
302 ioatdca->tag_map[i] = tag_map[i]; in ioat_dca_init()
316 struct ioat_dca_priv *ioatdca = dca_priv(dca); in ioat2_dca_add_requester() local
328 if (ioatdca->requester_count == ioatdca->max_requesters) in ioat2_dca_add_requester()
331 for (i = 0; i < ioatdca->max_requesters; i++) { in ioat2_dca_add_requester()
332 if (ioatdca->req_slots[i].pdev == NULL) { in ioat2_dca_add_requester()
334 ioatdca->requester_count++; in ioat2_dca_add_requester()
335 ioatdca->req_slots[i].pdev = pdev; in ioat2_dca_add_requester()
336 ioatdca->req_slots[i].rid = id; in ioat2_dca_add_requester()
338 readw(ioatdca->dca_base + IOAT_DCA_GREQID_OFFSET); in ioat2_dca_add_requester()
340 ioatdca->iobase + global_req_table + (i * 4)); in ioat2_dca_add_requester()
351 struct ioat_dca_priv *ioatdca = dca_priv(dca); in ioat2_dca_remove_requester() local
361 for (i = 0; i < ioatdca->max_requesters; i++) { in ioat2_dca_remove_requester()
362 if (ioatdca->req_slots[i].pdev == pdev) { in ioat2_dca_remove_requester()
364 readw(ioatdca->dca_base + IOAT_DCA_GREQID_OFFSET); in ioat2_dca_remove_requester()
365 writel(0, ioatdca->iobase + global_req_table + (i * 4)); in ioat2_dca_remove_requester()
366 ioatdca->req_slots[i].pdev = NULL; in ioat2_dca_remove_requester()
367 ioatdca->req_slots[i].rid = 0; in ioat2_dca_remove_requester()
368 ioatdca->requester_count--; in ioat2_dca_remove_requester()
413 struct ioat_dca_priv *ioatdca; in ioat2_dca_init() local
435 sizeof(*ioatdca) in ioat2_dca_init()
440 ioatdca = dca_priv(dca); in ioat2_dca_init()
441 ioatdca->iobase = iobase; in ioat2_dca_init()
442 ioatdca->dca_base = iobase + dca_offset; in ioat2_dca_init()
443 ioatdca->max_requesters = slots; in ioat2_dca_init()
446 csi_fsb_control = readw(ioatdca->dca_base + IOAT_FSB_CAP_ENABLE_OFFSET); in ioat2_dca_init()
450 ioatdca->dca_base + IOAT_FSB_CAP_ENABLE_OFFSET); in ioat2_dca_init()
452 pcie_control = readw(ioatdca->dca_base + IOAT_PCI_CAP_ENABLE_OFFSET); in ioat2_dca_init()
456 ioatdca->dca_base + IOAT_PCI_CAP_ENABLE_OFFSET); in ioat2_dca_init()
463 tag_map = readl(ioatdca->dca_base + IOAT_APICID_TAG_MAP_OFFSET); in ioat2_dca_init()
467 ioatdca->tag_map[i] = bit | DCA_TAG_MAP_VALID; in ioat2_dca_init()
469 ioatdca->tag_map[i] = 0; in ioat2_dca_init()
472 if (!dca2_tag_map_valid(ioatdca->tag_map)) { in ioat2_dca_init()
492 struct ioat_dca_priv *ioatdca = dca_priv(dca); in ioat3_dca_add_requester() local
504 if (ioatdca->requester_count == ioatdca->max_requesters) in ioat3_dca_add_requester()
507 for (i = 0; i < ioatdca->max_requesters; i++) { in ioat3_dca_add_requester()
508 if (ioatdca->req_slots[i].pdev == NULL) { in ioat3_dca_add_requester()
510 ioatdca->requester_count++; in ioat3_dca_add_requester()
511 ioatdca->req_slots[i].pdev = pdev; in ioat3_dca_add_requester()
512 ioatdca->req_slots[i].rid = id; in ioat3_dca_add_requester()
514 readw(ioatdca->dca_base + IOAT3_DCA_GREQID_OFFSET); in ioat3_dca_add_requester()
516 ioatdca->iobase + global_req_table + (i * 4)); in ioat3_dca_add_requester()
527 struct ioat_dca_priv *ioatdca = dca_priv(dca); in ioat3_dca_remove_requester() local
537 for (i = 0; i < ioatdca->max_requesters; i++) { in ioat3_dca_remove_requester()
538 if (ioatdca->req_slots[i].pdev == pdev) { in ioat3_dca_remove_requester()
540 readw(ioatdca->dca_base + IOAT3_DCA_GREQID_OFFSET); in ioat3_dca_remove_requester()
541 writel(0, ioatdca->iobase + global_req_table + (i * 4)); in ioat3_dca_remove_requester()
542 ioatdca->req_slots[i].pdev = NULL; in ioat3_dca_remove_requester()
543 ioatdca->req_slots[i].rid = 0; in ioat3_dca_remove_requester()
544 ioatdca->requester_count--; in ioat3_dca_remove_requester()
557 struct ioat_dca_priv *ioatdca = dca_priv(dca); in ioat3_dca_get_tag() local
565 entry = ioatdca->tag_map[i]; in ioat3_dca_get_tag()
627 struct ioat_dca_priv *ioatdca; in ioat3_dca_init() local
656 sizeof(*ioatdca) in ioat3_dca_init()
661 ioatdca = dca_priv(dca); in ioat3_dca_init()
662 ioatdca->iobase = iobase; in ioat3_dca_init()
663 ioatdca->dca_base = iobase + dca_offset; in ioat3_dca_init()
664 ioatdca->max_requesters = slots; in ioat3_dca_init()
667 csi_fsb_control = readw(ioatdca->dca_base + IOAT3_CSI_CONTROL_OFFSET); in ioat3_dca_init()
671 ioatdca->dca_base + IOAT3_CSI_CONTROL_OFFSET); in ioat3_dca_init()
673 pcie_control = readw(ioatdca->dca_base + IOAT3_PCI_CONTROL_OFFSET); in ioat3_dca_init()
677 ioatdca->dca_base + IOAT3_PCI_CONTROL_OFFSET); in ioat3_dca_init()
685 readl(ioatdca->dca_base + IOAT3_APICID_TAG_MAP_OFFSET_LOW); in ioat3_dca_init()
687 readl(ioatdca->dca_base + IOAT3_APICID_TAG_MAP_OFFSET_HIGH); in ioat3_dca_init()
690 ioatdca->tag_map[i] = bit & DCA_TAG_MAP_MASK; in ioat3_dca_init()
693 if (dca3_tag_map_invalid(ioatdca->tag_map)) { in ioat3_dca_init()