Lines Matching refs:and
4 # Licensed and distributed under the GPL
26 and:
48 levels are 0-4 (from low to high) and by default it is set to 2.
68 This is a simple interface to inject MCEs over /sysfs and test
76 Some systems are able to detect and correct errors in main
78 detection and correction (EDAC - or commonly referred to ECC
97 It should be noticed that keeping both GHES and a hardware-driven
110 Support for error detection and correction of DRAM ECC errors on
111 the AMD64 families of memory controllers (K8 and F10h)
117 Recent Opterons (Family 10h and later) provide for Memory Error
119 allows the operator/user to inject Uncorrectable and Correctable
129 In addition, there are two control files, inject_read and inject_write,
130 which trigger the DRAM ECC Read and Write respectively.
136 Support for error detection and correction on the AMD 76x
143 Support for error detection and correction on the Intel
144 E7205, E7500, E7501 and E7505 server chipsets.
147 tristate "Intel e752x (e7520, e7525, e7320) and 3100"
150 Support for error detection and correction on the Intel
158 Support for error detection and correction on the Intel
165 Support for error detection and correction on the Intel
166 DP82785P and E7210 server chipsets.
172 Support for error detection and correction on the Intel
179 Support for error detection and correction on the Intel
180 3000 and 3010 server chipsets.
186 Support for error detection and correction on the Intel
187 3200 and 3210 server chipsets.
193 Support for error detection and correction on the Intel
200 Support for error detection and correction the Intel
207 Support for error detection and correction the Intel
210 and Xeon 55xx processors.
216 Support for error detection and correction on the Intel
223 Support for error detection and correction on the Radisys
230 Support for error detection and correction the Intel
237 Support for error detection and correction the Intel
244 Support for error detection and correction the Intel
252 Support for error detection and correction the Intel
259 Support for error detection and correction on the Freescale
266 Support for error detection and correction on the Marvell
267 MV64360 and MV64460 chipsets.
274 Support for error detection and correction on PA Semi
281 Support for error detection and correction on the
292 440SP, 440SPe, 460EX, 460GT and 460SX.
298 Support for error detection and correction on the
307 Support for error detection and correction on the
316 Support for error detection and correction on the
317 IBM CPC925 Bridge and Memory Controller, which is
326 Support for error detection and correction on the
333 Support for error detection and correction on the
340 Support for error detection and correction on the
347 Support for error detection and correction on the primary caches of
354 Support for error detection and correction on the
361 Support for error detection and correction on the
368 Support for error detection and correction on the