Lines Matching defs:drm_i915_error_state

219 struct drm_i915_error_state {  struct
220 	struct kref ref;
221 	u32 eir;
222 	u32 pgtbl_er;
223 	u32 ier;
224 	u32 ccid;
225 	u32 derrmr;
226 	u32 forcewake;
227 	bool waiting[I915_NUM_RINGS];
228 	u32 pipestat[I915_MAX_PIPES];
229 	u32 tail[I915_NUM_RINGS];
230 	u32 head[I915_NUM_RINGS];
231 	u32 ctl[I915_NUM_RINGS];
232 	u32 ipeir[I915_NUM_RINGS];
233 	u32 ipehr[I915_NUM_RINGS];
234 	u32 instdone[I915_NUM_RINGS];
235 	u32 acthd[I915_NUM_RINGS];
236 	u32 semaphore_mboxes[I915_NUM_RINGS][I915_NUM_RINGS - 1];
237 	u32 semaphore_seqno[I915_NUM_RINGS][I915_NUM_RINGS - 1];
238 	u32 rc_psmi[I915_NUM_RINGS]; /* sleep state */
240 	u32 cpu_ring_head[I915_NUM_RINGS];
241 	u32 cpu_ring_tail[I915_NUM_RINGS];
242 	u32 error; /* gen6+ */
243 	u32 err_int; /* gen7 */
244 	u32 instpm[I915_NUM_RINGS];
245 	u32 instps[I915_NUM_RINGS];
246 	u32 extra_instdone[I915_NUM_INSTDONE_REG];
247 	u32 seqno[I915_NUM_RINGS];
248 	u64 bbaddr;
249 	u32 fault_reg[I915_NUM_RINGS];
250 	u32 done_reg;
251 	u32 faddr[I915_NUM_RINGS];
252 	u64 fence[I915_MAX_NUM_FENCES];
253 	struct timeval time;
254 	struct drm_i915_error_ring {
266 	} ring[I915_NUM_RINGS];
267 	struct drm_i915_error_buffer {
281 	} *active_bo, *pinned_bo;
282 	u32 active_bo_count, pinned_bo_count;
283 	struct intel_overlay_error_state *overlay;
284 	struct intel_display_error_state *display;