Lines Matching refs:tegra_dc_writel
655 tegra_dc_writel(dc, VSYNC_H_POSITION(1), in tegra_output_hdmi_enable()
657 tegra_dc_writel(dc, DITHER_CONTROL_DISABLE | BASE_COLOR_SIZE888, in tegra_output_hdmi_enable()
663 tegra_dc_writel(dc, H_PULSE_2_ENABLE, DC_DISP_DISP_SIGNAL_OPTIONS0); in tegra_output_hdmi_enable()
667 tegra_dc_writel(dc, value, DC_DISP_H_PULSE2_CONTROL); in tegra_output_hdmi_enable()
670 tegra_dc_writel(dc, value, DC_DISP_H_PULSE2_POSITION_A); in tegra_output_hdmi_enable()
766 tegra_dc_writel(dc, DISP_CTRL_MODE_STOP, DC_CMD_DISPLAY_COMMAND); in tegra_output_hdmi_enable()
767 tegra_dc_writel(dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL); in tegra_output_hdmi_enable()
768 tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL); in tegra_output_hdmi_enable()
819 tegra_dc_writel(dc, HDMI_ENABLE, DC_DISP_DISP_WIN_OPTIONS); in tegra_output_hdmi_enable()
823 tegra_dc_writel(dc, value, DC_CMD_DISPLAY_POWER_CONTROL); in tegra_output_hdmi_enable()
826 tegra_dc_writel(dc, value, DC_CMD_DISPLAY_COMMAND); in tegra_output_hdmi_enable()
828 tegra_dc_writel(dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL); in tegra_output_hdmi_enable()
829 tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL); in tegra_output_hdmi_enable()