Lines Matching refs:iface
36 static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface, in bfin_twi_handle_interrupt() argument
39 unsigned short mast_stat = read_MASTER_STAT(iface); in bfin_twi_handle_interrupt()
43 if (iface->writeNum > 0) { in bfin_twi_handle_interrupt()
45 write_XMT_DATA8(iface, *(iface->transPtr++)); in bfin_twi_handle_interrupt()
46 iface->writeNum--; in bfin_twi_handle_interrupt()
51 else if (iface->cur_mode == TWI_I2C_MODE_COMBINED) in bfin_twi_handle_interrupt()
52 write_MASTER_CTL(iface, in bfin_twi_handle_interrupt()
53 read_MASTER_CTL(iface) | MDIR); in bfin_twi_handle_interrupt()
54 else if (iface->manual_stop) in bfin_twi_handle_interrupt()
55 write_MASTER_CTL(iface, in bfin_twi_handle_interrupt()
56 read_MASTER_CTL(iface) | STOP); in bfin_twi_handle_interrupt()
57 else if (iface->cur_mode == TWI_I2C_MODE_REPEAT && in bfin_twi_handle_interrupt()
58 iface->cur_msg + 1 < iface->msg_num) { in bfin_twi_handle_interrupt()
59 if (iface->pmsg[iface->cur_msg + 1].flags & I2C_M_RD) in bfin_twi_handle_interrupt()
60 write_MASTER_CTL(iface, in bfin_twi_handle_interrupt()
61 read_MASTER_CTL(iface) | MDIR); in bfin_twi_handle_interrupt()
63 write_MASTER_CTL(iface, in bfin_twi_handle_interrupt()
64 read_MASTER_CTL(iface) & ~MDIR); in bfin_twi_handle_interrupt()
68 if (iface->readNum > 0) { in bfin_twi_handle_interrupt()
70 *(iface->transPtr) = read_RCV_DATA8(iface); in bfin_twi_handle_interrupt()
71 if (iface->cur_mode == TWI_I2C_MODE_COMBINED) { in bfin_twi_handle_interrupt()
75 iface->cur_mode = TWI_I2C_MODE_STANDARDSUB; in bfin_twi_handle_interrupt()
79 if (iface->readNum == 1 && iface->manual_stop) in bfin_twi_handle_interrupt()
80 iface->readNum = *iface->transPtr + 1; in bfin_twi_handle_interrupt()
82 iface->transPtr++; in bfin_twi_handle_interrupt()
83 iface->readNum--; in bfin_twi_handle_interrupt()
86 if (iface->readNum == 0) { in bfin_twi_handle_interrupt()
87 if (iface->manual_stop) { in bfin_twi_handle_interrupt()
91 read_RCV_DATA16(iface); in bfin_twi_handle_interrupt()
92 write_MASTER_CTL(iface, in bfin_twi_handle_interrupt()
93 read_MASTER_CTL(iface) | STOP); in bfin_twi_handle_interrupt()
94 } else if (iface->cur_mode == TWI_I2C_MODE_REPEAT && in bfin_twi_handle_interrupt()
95 iface->cur_msg + 1 < iface->msg_num) { in bfin_twi_handle_interrupt()
96 if (iface->pmsg[iface->cur_msg + 1].flags & I2C_M_RD) in bfin_twi_handle_interrupt()
97 write_MASTER_CTL(iface, in bfin_twi_handle_interrupt()
98 read_MASTER_CTL(iface) | MDIR); in bfin_twi_handle_interrupt()
100 write_MASTER_CTL(iface, in bfin_twi_handle_interrupt()
101 read_MASTER_CTL(iface) & ~MDIR); in bfin_twi_handle_interrupt()
106 write_INT_MASK(iface, 0); in bfin_twi_handle_interrupt()
107 write_MASTER_STAT(iface, 0x3e); in bfin_twi_handle_interrupt()
108 write_MASTER_CTL(iface, 0); in bfin_twi_handle_interrupt()
109 iface->result = -EIO; in bfin_twi_handle_interrupt()
112 dev_dbg(&iface->adap.dev, "Lost Arbitration\n"); in bfin_twi_handle_interrupt()
114 dev_dbg(&iface->adap.dev, "Address Not Acknowledged\n"); in bfin_twi_handle_interrupt()
116 dev_dbg(&iface->adap.dev, "Data Not Acknowledged\n"); in bfin_twi_handle_interrupt()
118 dev_dbg(&iface->adap.dev, "Buffer Read Error\n"); in bfin_twi_handle_interrupt()
120 dev_dbg(&iface->adap.dev, "Buffer Write Error\n"); in bfin_twi_handle_interrupt()
127 if (read_MASTER_STAT(iface) & SDASEN) { in bfin_twi_handle_interrupt()
130 write_MASTER_CTL(iface, SCLOVR); in bfin_twi_handle_interrupt()
132 write_MASTER_CTL(iface, 0); in bfin_twi_handle_interrupt()
134 } while ((read_MASTER_STAT(iface) & SDASEN) && cnt--); in bfin_twi_handle_interrupt()
136 write_MASTER_CTL(iface, SDAOVR | SCLOVR); in bfin_twi_handle_interrupt()
138 write_MASTER_CTL(iface, SDAOVR); in bfin_twi_handle_interrupt()
140 write_MASTER_CTL(iface, 0); in bfin_twi_handle_interrupt()
146 if (iface->cur_mode == TWI_I2C_MODE_STANDARD && in bfin_twi_handle_interrupt()
147 iface->transPtr == NULL && in bfin_twi_handle_interrupt()
149 iface->result = 1; in bfin_twi_handle_interrupt()
151 complete(&iface->complete); in bfin_twi_handle_interrupt()
156 (read_MASTER_CTL(iface) & MEN) == 0 && in bfin_twi_handle_interrupt()
157 (iface->cur_mode == TWI_I2C_MODE_REPEAT || in bfin_twi_handle_interrupt()
158 iface->cur_mode == TWI_I2C_MODE_COMBINED)) { in bfin_twi_handle_interrupt()
159 iface->result = -1; in bfin_twi_handle_interrupt()
160 write_INT_MASK(iface, 0); in bfin_twi_handle_interrupt()
161 write_MASTER_CTL(iface, 0); in bfin_twi_handle_interrupt()
162 } else if (iface->cur_mode == TWI_I2C_MODE_COMBINED) { in bfin_twi_handle_interrupt()
163 if (iface->readNum == 0) { in bfin_twi_handle_interrupt()
167 iface->readNum = 1; in bfin_twi_handle_interrupt()
168 iface->manual_stop = 1; in bfin_twi_handle_interrupt()
169 write_MASTER_CTL(iface, in bfin_twi_handle_interrupt()
170 read_MASTER_CTL(iface) | (0xff << 6)); in bfin_twi_handle_interrupt()
175 write_MASTER_CTL(iface, in bfin_twi_handle_interrupt()
176 (read_MASTER_CTL(iface) & in bfin_twi_handle_interrupt()
178 (iface->readNum << 6)); in bfin_twi_handle_interrupt()
181 write_MASTER_CTL(iface, in bfin_twi_handle_interrupt()
182 read_MASTER_CTL(iface) & ~RSTART); in bfin_twi_handle_interrupt()
183 } else if (iface->cur_mode == TWI_I2C_MODE_REPEAT && in bfin_twi_handle_interrupt()
184 iface->cur_msg + 1 < iface->msg_num) { in bfin_twi_handle_interrupt()
185 iface->cur_msg++; in bfin_twi_handle_interrupt()
186 iface->transPtr = iface->pmsg[iface->cur_msg].buf; in bfin_twi_handle_interrupt()
187 iface->writeNum = iface->readNum = in bfin_twi_handle_interrupt()
188 iface->pmsg[iface->cur_msg].len; in bfin_twi_handle_interrupt()
190 write_MASTER_ADDR(iface, in bfin_twi_handle_interrupt()
191 iface->pmsg[iface->cur_msg].addr); in bfin_twi_handle_interrupt()
192 if (iface->pmsg[iface->cur_msg].flags & I2C_M_RD) in bfin_twi_handle_interrupt()
193 iface->read_write = I2C_SMBUS_READ; in bfin_twi_handle_interrupt()
195 iface->read_write = I2C_SMBUS_WRITE; in bfin_twi_handle_interrupt()
197 if (iface->writeNum > 0) { in bfin_twi_handle_interrupt()
198 write_XMT_DATA8(iface, in bfin_twi_handle_interrupt()
199 *(iface->transPtr++)); in bfin_twi_handle_interrupt()
200 iface->writeNum--; in bfin_twi_handle_interrupt()
204 if (iface->pmsg[iface->cur_msg].len <= 255) { in bfin_twi_handle_interrupt()
205 write_MASTER_CTL(iface, in bfin_twi_handle_interrupt()
206 (read_MASTER_CTL(iface) & in bfin_twi_handle_interrupt()
208 (iface->pmsg[iface->cur_msg].len << 6)); in bfin_twi_handle_interrupt()
209 iface->manual_stop = 0; in bfin_twi_handle_interrupt()
211 write_MASTER_CTL(iface, in bfin_twi_handle_interrupt()
212 (read_MASTER_CTL(iface) | in bfin_twi_handle_interrupt()
214 iface->manual_stop = 1; in bfin_twi_handle_interrupt()
217 if (iface->cur_msg + 1 == iface->msg_num) in bfin_twi_handle_interrupt()
218 write_MASTER_CTL(iface, in bfin_twi_handle_interrupt()
219 read_MASTER_CTL(iface) & ~RSTART); in bfin_twi_handle_interrupt()
221 iface->result = 1; in bfin_twi_handle_interrupt()
222 write_INT_MASK(iface, 0); in bfin_twi_handle_interrupt()
223 write_MASTER_CTL(iface, 0); in bfin_twi_handle_interrupt()
225 complete(&iface->complete); in bfin_twi_handle_interrupt()
232 struct bfin_twi_iface *iface = dev_id; in bfin_twi_interrupt_entry() local
236 spin_lock_irqsave(&iface->lock, flags); in bfin_twi_interrupt_entry()
238 twi_int_status = read_INT_STAT(iface); in bfin_twi_interrupt_entry()
242 write_INT_STAT(iface, twi_int_status); in bfin_twi_interrupt_entry()
243 bfin_twi_handle_interrupt(iface, twi_int_status); in bfin_twi_interrupt_entry()
246 spin_unlock_irqrestore(&iface->lock, flags); in bfin_twi_interrupt_entry()
256 struct bfin_twi_iface *iface = adap->algo_data; in bfin_twi_do_master_xfer() local
260 if (!(read_CONTROL(iface) & TWI_ENA)) in bfin_twi_do_master_xfer()
263 if (read_MASTER_STAT(iface) & BUSBUSY) in bfin_twi_do_master_xfer()
266 iface->pmsg = msgs; in bfin_twi_do_master_xfer()
267 iface->msg_num = num; in bfin_twi_do_master_xfer()
268 iface->cur_msg = 0; in bfin_twi_do_master_xfer()
276 if (iface->msg_num > 1) in bfin_twi_do_master_xfer()
277 iface->cur_mode = TWI_I2C_MODE_REPEAT; in bfin_twi_do_master_xfer()
278 iface->manual_stop = 0; in bfin_twi_do_master_xfer()
279 iface->transPtr = pmsg->buf; in bfin_twi_do_master_xfer()
280 iface->writeNum = iface->readNum = pmsg->len; in bfin_twi_do_master_xfer()
281 iface->result = 0; in bfin_twi_do_master_xfer()
282 init_completion(&(iface->complete)); in bfin_twi_do_master_xfer()
284 write_MASTER_ADDR(iface, pmsg->addr); in bfin_twi_do_master_xfer()
289 write_FIFO_CTL(iface, 0x3); in bfin_twi_do_master_xfer()
291 write_FIFO_CTL(iface, 0); in bfin_twi_do_master_xfer()
295 iface->read_write = I2C_SMBUS_READ; in bfin_twi_do_master_xfer()
297 iface->read_write = I2C_SMBUS_WRITE; in bfin_twi_do_master_xfer()
299 if (iface->writeNum > 0) { in bfin_twi_do_master_xfer()
300 write_XMT_DATA8(iface, *(iface->transPtr++)); in bfin_twi_do_master_xfer()
301 iface->writeNum--; in bfin_twi_do_master_xfer()
307 write_INT_STAT(iface, MERR | MCOMP | XMTSERV | RCVSERV); in bfin_twi_do_master_xfer()
310 write_INT_MASK(iface, MCOMP | MERR | RCVSERV | XMTSERV); in bfin_twi_do_master_xfer()
314 write_MASTER_CTL(iface, pmsg->len << 6); in bfin_twi_do_master_xfer()
316 write_MASTER_CTL(iface, 0xff << 6); in bfin_twi_do_master_xfer()
317 iface->manual_stop = 1; in bfin_twi_do_master_xfer()
321 write_MASTER_CTL(iface, read_MASTER_CTL(iface) | MEN | in bfin_twi_do_master_xfer()
322 (iface->msg_num > 1 ? RSTART : 0) | in bfin_twi_do_master_xfer()
323 ((iface->read_write == I2C_SMBUS_READ) ? MDIR : 0) | in bfin_twi_do_master_xfer()
327 while (!iface->result) { in bfin_twi_do_master_xfer()
328 if (!wait_for_completion_timeout(&iface->complete, in bfin_twi_do_master_xfer()
330 iface->result = -1; in bfin_twi_do_master_xfer()
335 if (iface->result == 1) in bfin_twi_do_master_xfer()
336 rc = iface->cur_msg + 1; in bfin_twi_do_master_xfer()
338 rc = iface->result; in bfin_twi_do_master_xfer()
359 struct bfin_twi_iface *iface = adap->algo_data; in bfin_twi_do_smbus_xfer() local
362 if (!(read_CONTROL(iface) & TWI_ENA)) in bfin_twi_do_smbus_xfer()
365 if (read_MASTER_STAT(iface) & BUSBUSY) in bfin_twi_do_smbus_xfer()
368 iface->writeNum = 0; in bfin_twi_do_smbus_xfer()
369 iface->readNum = 0; in bfin_twi_do_smbus_xfer()
374 iface->transPtr = NULL; in bfin_twi_do_smbus_xfer()
375 iface->cur_mode = TWI_I2C_MODE_STANDARD; in bfin_twi_do_smbus_xfer()
379 iface->transPtr = NULL; in bfin_twi_do_smbus_xfer()
382 iface->readNum = 1; in bfin_twi_do_smbus_xfer()
384 iface->writeNum = 1; in bfin_twi_do_smbus_xfer()
385 iface->transPtr = &data->byte; in bfin_twi_do_smbus_xfer()
387 iface->cur_mode = TWI_I2C_MODE_STANDARD; in bfin_twi_do_smbus_xfer()
391 iface->readNum = 1; in bfin_twi_do_smbus_xfer()
392 iface->cur_mode = TWI_I2C_MODE_COMBINED; in bfin_twi_do_smbus_xfer()
394 iface->writeNum = 1; in bfin_twi_do_smbus_xfer()
395 iface->cur_mode = TWI_I2C_MODE_STANDARDSUB; in bfin_twi_do_smbus_xfer()
397 iface->transPtr = &data->byte; in bfin_twi_do_smbus_xfer()
401 iface->readNum = 2; in bfin_twi_do_smbus_xfer()
402 iface->cur_mode = TWI_I2C_MODE_COMBINED; in bfin_twi_do_smbus_xfer()
404 iface->writeNum = 2; in bfin_twi_do_smbus_xfer()
405 iface->cur_mode = TWI_I2C_MODE_STANDARDSUB; in bfin_twi_do_smbus_xfer()
407 iface->transPtr = (u8 *)&data->word; in bfin_twi_do_smbus_xfer()
410 iface->writeNum = 2; in bfin_twi_do_smbus_xfer()
411 iface->readNum = 2; in bfin_twi_do_smbus_xfer()
412 iface->cur_mode = TWI_I2C_MODE_COMBINED; in bfin_twi_do_smbus_xfer()
413 iface->transPtr = (u8 *)&data->word; in bfin_twi_do_smbus_xfer()
417 iface->readNum = 0; in bfin_twi_do_smbus_xfer()
418 iface->cur_mode = TWI_I2C_MODE_COMBINED; in bfin_twi_do_smbus_xfer()
420 iface->writeNum = data->block[0] + 1; in bfin_twi_do_smbus_xfer()
421 iface->cur_mode = TWI_I2C_MODE_STANDARDSUB; in bfin_twi_do_smbus_xfer()
423 iface->transPtr = data->block; in bfin_twi_do_smbus_xfer()
427 iface->readNum = data->block[0]; in bfin_twi_do_smbus_xfer()
428 iface->cur_mode = TWI_I2C_MODE_COMBINED; in bfin_twi_do_smbus_xfer()
430 iface->writeNum = data->block[0]; in bfin_twi_do_smbus_xfer()
431 iface->cur_mode = TWI_I2C_MODE_STANDARDSUB; in bfin_twi_do_smbus_xfer()
433 iface->transPtr = (u8 *)&data->block[1]; in bfin_twi_do_smbus_xfer()
439 iface->result = 0; in bfin_twi_do_smbus_xfer()
440 iface->manual_stop = 0; in bfin_twi_do_smbus_xfer()
441 iface->read_write = read_write; in bfin_twi_do_smbus_xfer()
442 iface->command = command; in bfin_twi_do_smbus_xfer()
443 init_completion(&(iface->complete)); in bfin_twi_do_smbus_xfer()
448 write_FIFO_CTL(iface, 0x3); in bfin_twi_do_smbus_xfer()
450 write_FIFO_CTL(iface, 0); in bfin_twi_do_smbus_xfer()
453 write_INT_STAT(iface, MERR | MCOMP | XMTSERV | RCVSERV); in bfin_twi_do_smbus_xfer()
456 write_MASTER_ADDR(iface, addr); in bfin_twi_do_smbus_xfer()
459 switch (iface->cur_mode) { in bfin_twi_do_smbus_xfer()
461 write_XMT_DATA8(iface, iface->command); in bfin_twi_do_smbus_xfer()
462 write_INT_MASK(iface, MCOMP | MERR | in bfin_twi_do_smbus_xfer()
463 ((iface->read_write == I2C_SMBUS_READ) ? in bfin_twi_do_smbus_xfer()
467 if (iface->writeNum + 1 <= 255) in bfin_twi_do_smbus_xfer()
468 write_MASTER_CTL(iface, (iface->writeNum + 1) << 6); in bfin_twi_do_smbus_xfer()
470 write_MASTER_CTL(iface, 0xff << 6); in bfin_twi_do_smbus_xfer()
471 iface->manual_stop = 1; in bfin_twi_do_smbus_xfer()
474 write_MASTER_CTL(iface, read_MASTER_CTL(iface) | MEN | in bfin_twi_do_smbus_xfer()
478 write_XMT_DATA8(iface, iface->command); in bfin_twi_do_smbus_xfer()
479 write_INT_MASK(iface, MCOMP | MERR | RCVSERV | XMTSERV); in bfin_twi_do_smbus_xfer()
482 if (iface->writeNum > 0) in bfin_twi_do_smbus_xfer()
483 write_MASTER_CTL(iface, (iface->writeNum + 1) << 6); in bfin_twi_do_smbus_xfer()
485 write_MASTER_CTL(iface, 0x1 << 6); in bfin_twi_do_smbus_xfer()
487 write_MASTER_CTL(iface, read_MASTER_CTL(iface) | MEN | RSTART | in bfin_twi_do_smbus_xfer()
491 write_MASTER_CTL(iface, 0); in bfin_twi_do_smbus_xfer()
496 if (iface->read_write != I2C_SMBUS_READ) { in bfin_twi_do_smbus_xfer()
497 if (iface->writeNum > 0) { in bfin_twi_do_smbus_xfer()
498 write_XMT_DATA8(iface, in bfin_twi_do_smbus_xfer()
499 *(iface->transPtr++)); in bfin_twi_do_smbus_xfer()
500 if (iface->writeNum <= 255) in bfin_twi_do_smbus_xfer()
501 write_MASTER_CTL(iface, in bfin_twi_do_smbus_xfer()
502 iface->writeNum << 6); in bfin_twi_do_smbus_xfer()
504 write_MASTER_CTL(iface, in bfin_twi_do_smbus_xfer()
506 iface->manual_stop = 1; in bfin_twi_do_smbus_xfer()
508 iface->writeNum--; in bfin_twi_do_smbus_xfer()
510 write_XMT_DATA8(iface, iface->command); in bfin_twi_do_smbus_xfer()
511 write_MASTER_CTL(iface, 1 << 6); in bfin_twi_do_smbus_xfer()
514 if (iface->readNum > 0 && iface->readNum <= 255) in bfin_twi_do_smbus_xfer()
515 write_MASTER_CTL(iface, in bfin_twi_do_smbus_xfer()
516 iface->readNum << 6); in bfin_twi_do_smbus_xfer()
517 else if (iface->readNum > 255) { in bfin_twi_do_smbus_xfer()
518 write_MASTER_CTL(iface, 0xff << 6); in bfin_twi_do_smbus_xfer()
519 iface->manual_stop = 1; in bfin_twi_do_smbus_xfer()
524 write_INT_MASK(iface, MCOMP | MERR | in bfin_twi_do_smbus_xfer()
525 ((iface->read_write == I2C_SMBUS_READ) ? in bfin_twi_do_smbus_xfer()
530 write_MASTER_CTL(iface, read_MASTER_CTL(iface) | MEN | in bfin_twi_do_smbus_xfer()
531 ((iface->read_write == I2C_SMBUS_READ) ? MDIR : 0) | in bfin_twi_do_smbus_xfer()
537 while (!iface->result) { in bfin_twi_do_smbus_xfer()
538 if (!wait_for_completion_timeout(&iface->complete, in bfin_twi_do_smbus_xfer()
540 iface->result = -1; in bfin_twi_do_smbus_xfer()
545 rc = (iface->result >= 0) ? 0 : -1; in bfin_twi_do_smbus_xfer()
580 struct bfin_twi_iface *iface = dev_get_drvdata(dev); in i2c_bfin_twi_suspend() local
582 iface->saved_clkdiv = read_CLKDIV(iface); in i2c_bfin_twi_suspend()
583 iface->saved_control = read_CONTROL(iface); in i2c_bfin_twi_suspend()
585 free_irq(iface->irq, iface); in i2c_bfin_twi_suspend()
588 write_CONTROL(iface, iface->saved_control & ~TWI_ENA); in i2c_bfin_twi_suspend()
595 struct bfin_twi_iface *iface = dev_get_drvdata(dev); in i2c_bfin_twi_resume() local
597 int rc = request_irq(iface->irq, bfin_twi_interrupt_entry, in i2c_bfin_twi_resume()
598 0, to_platform_device(dev)->name, iface); in i2c_bfin_twi_resume()
600 dev_err(dev, "Can't get IRQ %d !\n", iface->irq); in i2c_bfin_twi_resume()
605 write_CLKDIV(iface, iface->saved_clkdiv); in i2c_bfin_twi_resume()
608 write_CONTROL(iface, iface->saved_control); in i2c_bfin_twi_resume()
618 struct bfin_twi_iface *iface; in i2c_bfin_twi_probe() local
624 iface = kzalloc(sizeof(struct bfin_twi_iface), GFP_KERNEL); in i2c_bfin_twi_probe()
625 if (!iface) { in i2c_bfin_twi_probe()
631 spin_lock_init(&(iface->lock)); in i2c_bfin_twi_probe()
641 iface->regs_base = ioremap(res->start, resource_size(res)); in i2c_bfin_twi_probe()
642 if (iface->regs_base == NULL) { in i2c_bfin_twi_probe()
648 iface->irq = platform_get_irq(pdev, 0); in i2c_bfin_twi_probe()
649 if (iface->irq < 0) { in i2c_bfin_twi_probe()
655 p_adap = &iface->adap; in i2c_bfin_twi_probe()
659 p_adap->algo_data = iface; in i2c_bfin_twi_probe()
672 rc = request_irq(iface->irq, bfin_twi_interrupt_entry, in i2c_bfin_twi_probe()
673 0, pdev->name, iface); in i2c_bfin_twi_probe()
675 dev_err(&pdev->dev, "Can't get IRQ %d !\n", iface->irq); in i2c_bfin_twi_probe()
681 write_CONTROL(iface, ((get_sclk() / 1000 / 1000 + 5) / 10) & 0x7F); in i2c_bfin_twi_probe()
690 write_CLKDIV(iface, (clkhilow << 8) | clkhilow); in i2c_bfin_twi_probe()
693 write_CONTROL(iface, read_CONTROL(iface) | TWI_ENA); in i2c_bfin_twi_probe()
702 platform_set_drvdata(pdev, iface); in i2c_bfin_twi_probe()
705 "regs_base@%p\n", iface->regs_base); in i2c_bfin_twi_probe()
710 free_irq(iface->irq, iface); in i2c_bfin_twi_probe()
715 iounmap(iface->regs_base); in i2c_bfin_twi_probe()
718 kfree(iface); in i2c_bfin_twi_probe()
725 struct bfin_twi_iface *iface = platform_get_drvdata(pdev); in i2c_bfin_twi_remove() local
727 i2c_del_adapter(&(iface->adap)); in i2c_bfin_twi_remove()
728 free_irq(iface->irq, iface); in i2c_bfin_twi_remove()
730 iounmap(iface->regs_base); in i2c_bfin_twi_remove()
731 kfree(iface); in i2c_bfin_twi_remove()