Lines Matching refs:state
203 static int dib9000_risc_apb_access_read(struct dib9000_state *state, u32 address, u16 attribute, co…
204 static int dib9000_risc_apb_access_write(struct dib9000_state *state, u32 address, u16 attribute, c…
228 static u16 dib9000_read16_attr(struct dib9000_state *state, u16 reg, u8 * b, u32 len, u16 attribute) in dib9000_read16_attr() argument
234 if (state->platform.risc.fw_is_running && (reg < 1024)) in dib9000_read16_attr()
235 return dib9000_risc_apb_access_read(state, reg, attribute, NULL, 0, b, len); in dib9000_read16_attr()
237 memset(state->msg, 0, 2 * sizeof(struct i2c_msg)); in dib9000_read16_attr()
238 state->msg[0].addr = state->i2c.i2c_addr >> 1; in dib9000_read16_attr()
239 state->msg[0].flags = 0; in dib9000_read16_attr()
240 state->msg[0].buf = state->i2c_write_buffer; in dib9000_read16_attr()
241 state->msg[0].len = 2; in dib9000_read16_attr()
242 state->msg[1].addr = state->i2c.i2c_addr >> 1; in dib9000_read16_attr()
243 state->msg[1].flags = I2C_M_RD; in dib9000_read16_attr()
244 state->msg[1].buf = b; in dib9000_read16_attr()
245 state->msg[1].len = len; in dib9000_read16_attr()
247 state->i2c_write_buffer[0] = reg >> 8; in dib9000_read16_attr()
248 state->i2c_write_buffer[1] = reg & 0xff; in dib9000_read16_attr()
251 state->i2c_write_buffer[0] |= (1 << 5); in dib9000_read16_attr()
253 state->i2c_write_buffer[0] |= (1 << 4); in dib9000_read16_attr()
257 state->msg[1].len = l; in dib9000_read16_attr()
258 state->msg[1].buf = b; in dib9000_read16_attr()
259 ret = i2c_transfer(state->i2c.i2c_adap, state->msg, 2) != 2 ? -EREMOTEIO : 0; in dib9000_read16_attr()
295 static inline u16 dib9000_read_word(struct dib9000_state *state, u16 reg) in dib9000_read_word() argument
297 if (dib9000_read16_attr(state, reg, state->i2c_read_buffer, 2, 0) != 0) in dib9000_read_word()
299 return (state->i2c_read_buffer[0] << 8) | state->i2c_read_buffer[1]; in dib9000_read_word()
302 static inline u16 dib9000_read_word_attr(struct dib9000_state *state, u16 reg, u16 attribute) in dib9000_read_word_attr() argument
304 if (dib9000_read16_attr(state, reg, state->i2c_read_buffer, 2, in dib9000_read_word_attr()
307 return (state->i2c_read_buffer[0] << 8) | state->i2c_read_buffer[1]; in dib9000_read_word_attr()
310 #define dib9000_read16_noinc_attr(state, reg, b, len, attribute) dib9000_read16_attr(state, reg, b,… argument
312 static u16 dib9000_write16_attr(struct dib9000_state *state, u16 reg, const u8 * buf, u32 len, u16 … in dib9000_write16_attr() argument
318 if (state->platform.risc.fw_is_running && (reg < 1024)) { in dib9000_write16_attr()
320 …(state, reg, DATA_BUS_ACCESS_MODE_16BIT | DATA_BUS_ACCESS_MODE_NO_ADDRESS_INCREMENT | attribute, b… in dib9000_write16_attr()
325 memset(&state->msg[0], 0, sizeof(struct i2c_msg)); in dib9000_write16_attr()
326 state->msg[0].addr = state->i2c.i2c_addr >> 1; in dib9000_write16_attr()
327 state->msg[0].flags = 0; in dib9000_write16_attr()
328 state->msg[0].buf = state->i2c_write_buffer; in dib9000_write16_attr()
329 state->msg[0].len = len + 2; in dib9000_write16_attr()
331 state->i2c_write_buffer[0] = (reg >> 8) & 0xff; in dib9000_write16_attr()
332 state->i2c_write_buffer[1] = (reg) & 0xff; in dib9000_write16_attr()
335 state->i2c_write_buffer[0] |= (1 << 5); in dib9000_write16_attr()
337 state->i2c_write_buffer[0] |= (1 << 4); in dib9000_write16_attr()
341 state->msg[0].len = l + 2; in dib9000_write16_attr()
342 memcpy(&state->i2c_write_buffer[2], buf, l); in dib9000_write16_attr()
344 ret = i2c_transfer(state->i2c.i2c_adap, state->msg, 1) != 1 ? -EREMOTEIO : 0; in dib9000_write16_attr()
371 static inline int dib9000_write_word(struct dib9000_state *state, u16 reg, u16 val) in dib9000_write_word() argument
374 return dib9000_write16_attr(state, reg, b, 2, 0); in dib9000_write_word()
377 static inline int dib9000_write_word_attr(struct dib9000_state *state, u16 reg, u16 val, u16 attrib… in dib9000_write_word_attr() argument
380 return dib9000_write16_attr(state, reg, b, 2, attribute); in dib9000_write_word_attr()
383 #define dib9000_write(state, reg, buf, len) dib9000_write16_attr(state, reg, buf, len, 0) argument
384 #define dib9000_write16_noinc(state, reg, buf, len) dib9000_write16_attr(state, reg, buf, len, DATA… argument
385 #define dib9000_write16_noinc_attr(state, reg, buf, len, attribute) dib9000_write16_attr(state, reg… argument
387 #define dib9000_mbx_send(state, id, data, len) dib9000_mbx_send_attr(state, id, data, len, 0) argument
388 #define dib9000_mbx_get_message(state, id, msg, len) dib9000_mbx_get_message_attr(state, id, msg, l… argument
393 #define dib9000_risc_mem_read_chunks(state, b, len) dib9000_read16_attr(state, 1063, b, len, DATA_B… argument
394 #define dib9000_risc_mem_write_chunks(state, buf, len) dib9000_write16_attr(state, 1063, buf, len, … argument
396 static void dib9000_risc_mem_setup_cmd(struct dib9000_state *state, u32 addr, u32 len, u8 reading) in dib9000_risc_mem_setup_cmd() argument
420 dib9000_write(state, 1056, b, 14); in dib9000_risc_mem_setup_cmd()
422 dib9000_write_word(state, 1056, (1 << 15) | 1); in dib9000_risc_mem_setup_cmd()
423 …state->platform.risc.memcmd = -1; /* if it was called directly reset it - to force a future setup-… in dib9000_risc_mem_setup_cmd()
426 static void dib9000_risc_mem_setup(struct dib9000_state *state, u8 cmd) in dib9000_risc_mem_setup() argument
428 struct dib9000_fe_memory_map *m = &state->platform.risc.fe_mm[cmd & 0x7f]; in dib9000_risc_mem_setup()
430 if (state->platform.risc.memcmd == cmd && /* same command */ in dib9000_risc_mem_setup()
433 dib9000_risc_mem_setup_cmd(state, m->addr, m->size, cmd & 0x80); in dib9000_risc_mem_setup()
434 state->platform.risc.memcmd = cmd; in dib9000_risc_mem_setup()
437 static int dib9000_risc_mem_read(struct dib9000_state *state, u8 cmd, u8 * b, u16 len) in dib9000_risc_mem_read() argument
439 if (!state->platform.risc.fw_is_running) in dib9000_risc_mem_read()
442 if (mutex_lock_interruptible(&state->platform.risc.mem_lock) < 0) { in dib9000_risc_mem_read()
446 dib9000_risc_mem_setup(state, cmd | 0x80); in dib9000_risc_mem_read()
447 dib9000_risc_mem_read_chunks(state, b, len); in dib9000_risc_mem_read()
448 mutex_unlock(&state->platform.risc.mem_lock); in dib9000_risc_mem_read()
452 static int dib9000_risc_mem_write(struct dib9000_state *state, u8 cmd, const u8 * b) in dib9000_risc_mem_write() argument
454 struct dib9000_fe_memory_map *m = &state->platform.risc.fe_mm[cmd]; in dib9000_risc_mem_write()
455 if (!state->platform.risc.fw_is_running) in dib9000_risc_mem_write()
458 if (mutex_lock_interruptible(&state->platform.risc.mem_lock) < 0) { in dib9000_risc_mem_write()
462 dib9000_risc_mem_setup(state, cmd); in dib9000_risc_mem_write()
463 dib9000_risc_mem_write_chunks(state, b, m->size); in dib9000_risc_mem_write()
464 mutex_unlock(&state->platform.risc.mem_lock); in dib9000_risc_mem_write()
468 static int dib9000_firmware_download(struct dib9000_state *state, u8 risc_id, u16 key, const u8 * c… in dib9000_firmware_download() argument
478 dib9000_write_word(state, 1024 + offs, 0x000f); in dib9000_firmware_download()
479 dib9000_write_word(state, 1025 + offs, 0); in dib9000_firmware_download()
480 dib9000_write_word(state, 1031 + offs, key); in dib9000_firmware_download()
483 if (dib9000_write16_noinc(state, 1026 + offs, (u8 *) code, (u16) len) != 0) { in dib9000_firmware_download()
493 static int dib9000_mbx_host_init(struct dib9000_state *state, u8 risc_id) in dib9000_mbx_host_init() argument
505 dib9000_write_word(state, 1027 + mbox_offs, 0x8000); in dib9000_mbx_host_init()
509 reset_reg = dib9000_read_word(state, 1027 + mbox_offs); in dib9000_mbx_host_init()
522 static int dib9000_mbx_send_attr(struct dib9000_state *state, u8 id, u16 * data, u8 len, u16 attr) in dib9000_mbx_send_attr() argument
530 if (!state->platform.risc.fw_is_running) in dib9000_mbx_send_attr()
533 if (mutex_lock_interruptible(&state->platform.risc.mbx_if_lock) < 0) { in dib9000_mbx_send_attr()
539 size = dib9000_read_word_attr(state, 1043, attr) & 0xff; in dib9000_mbx_send_attr()
571 …if (dib9000_write16_noinc_attr(state, 1045, b, 2, attr) != 0 || dib9000_write16_noinc_attr(state, … in dib9000_mbx_send_attr()
577 ret = (u8) dib9000_write_word_attr(state, 1043, 1 << 14, attr); in dib9000_mbx_send_attr()
580 mutex_unlock(&state->platform.risc.mbx_if_lock); in dib9000_mbx_send_attr()
585 static u8 dib9000_mbx_read(struct dib9000_state *state, u16 * data, u8 risc_id, u16 attr) in dib9000_mbx_read() argument
595 if (!state->platform.risc.fw_is_running) in dib9000_mbx_read()
598 if (mutex_lock_interruptible(&state->platform.risc.mbx_if_lock) < 0) { in dib9000_mbx_read()
608 *data = dib9000_read_word_attr(state, 1029 + mc_base, attr); in dib9000_mbx_read()
615 dib9000_read16_noinc_attr(state, 1029 + mc_base, (u8 *) data, size * 2, attr); in dib9000_mbx_read()
634 dib9000_read16_noinc_attr(state, 1029 + mc_base, (u8 *) data, 2, attr); in dib9000_mbx_read()
637 dib9000_write_word_attr(state, 1028 + mc_base, 1 << 14, attr); in dib9000_mbx_read()
639 mutex_unlock(&state->platform.risc.mbx_if_lock); in dib9000_mbx_read()
644 static int dib9000_risc_debug_buf(struct dib9000_state *state, u16 * data, u8 size) in dib9000_risc_debug_buf() argument
654 dprintk("RISC%d: %d.%04d %s", state->fe_id, ts / 10000, ts % 10000, *b ? b : "<emtpy>"); in dib9000_risc_debug_buf()
658 static int dib9000_mbx_fetch_to_cache(struct dib9000_state *state, u16 attr) in dib9000_mbx_fetch_to_cache() argument
665 block = state->platform.risc.message_cache[i]; in dib9000_mbx_fetch_to_cache()
667 size = dib9000_mbx_read(state, block, 1, attr); in dib9000_mbx_fetch_to_cache()
673 …dib9000_risc_debug_buf(state, block + 1, size); /* debug-messages are going to be printed right aw… in dib9000_mbx_fetch_to_cache()
678 dib9000_risc_data_process(state, block + 1, size); in dib9000_mbx_fetch_to_cache()
693 static u8 dib9000_mbx_count(struct dib9000_state *state, u8 risc_id, u16 attr) in dib9000_mbx_count() argument
696 return (u8) (dib9000_read_word_attr(state, 1028, attr) >> 10) & 0x1f; /* 5 bit field */ in dib9000_mbx_count()
698 return (u8) (dib9000_read_word_attr(state, 1044, attr) >> 8) & 0x7f; /* 7 bit field */ in dib9000_mbx_count()
701 static int dib9000_mbx_process(struct dib9000_state *state, u16 attr) in dib9000_mbx_process() argument
705 if (!state->platform.risc.fw_is_running) in dib9000_mbx_process()
708 if (mutex_lock_interruptible(&state->platform.risc.mbx_lock) < 0) { in dib9000_mbx_process()
713 if (dib9000_mbx_count(state, 1, attr)) /* 1=RiscB */ in dib9000_mbx_process()
714 ret = dib9000_mbx_fetch_to_cache(state, attr); in dib9000_mbx_process()
716 dib9000_read_word_attr(state, 1229, attr); /* Clear the IRQ */ in dib9000_mbx_process()
719 mutex_unlock(&state->platform.risc.mbx_lock); in dib9000_mbx_process()
724 static int dib9000_mbx_get_message_attr(struct dib9000_state *state, u16 id, u16 * msg, u8 * size, … in dib9000_mbx_get_message_attr() argument
734 block = state->platform.risc.message_cache[i]; in dib9000_mbx_get_message_attr()
747 if (dib9000_mbx_process(state, attr) == -1) /* try to fetch one message - if any */ in dib9000_mbx_get_message_attr()
760 static int dib9000_risc_check_version(struct dib9000_state *state) in dib9000_risc_check_version() argument
766 if (dib9000_mbx_send(state, OUT_MSG_REQ_VERSION, &fw_version, 1) != 0) in dib9000_risc_check_version()
769 if (dib9000_mbx_get_message(state, IN_MSG_VERSION, (u16 *) r, &size) < 0) in dib9000_risc_check_version()
795 static int dib9000_fw_boot(struct dib9000_state *state, const u8 * codeA, u32 lenA, const u8 * code… in dib9000_fw_boot() argument
798 dib9000_write_word(state, 1225, 0x02); /* A: 8k C, 4 k D - B: 32k C 6 k D - IRAM 96k */ in dib9000_fw_boot()
799 dib9000_write_word(state, 1226, 0x05); in dib9000_fw_boot()
802 dib9000_write_word(state, 1542, 1); in dib9000_fw_boot()
805 dib9000_write_word(state, 1074, 0); in dib9000_fw_boot()
806 dib9000_write_word(state, 1075, 0); in dib9000_fw_boot()
809 dib9000_write_word(state, 1237, 0); in dib9000_fw_boot()
813 dib9000_write_word(state, 1024, 2); in dib9000_fw_boot()
815 dib9000_write_word(state, 1024, 15); in dib9000_fw_boot()
817 dib9000_write_word(state, 1040, 2); in dib9000_fw_boot()
820 dib9000_firmware_download(state, 0, 0x1234, codeA, lenA); in dib9000_fw_boot()
822 dib9000_firmware_download(state, 1, 0x1234, codeB, lenB); in dib9000_fw_boot()
826 dib9000_write_word(state, 1024, 0); in dib9000_fw_boot()
828 dib9000_write_word(state, 1040, 0); in dib9000_fw_boot()
831 if (dib9000_mbx_host_init(state, 0) != 0) in dib9000_fw_boot()
834 if (dib9000_mbx_host_init(state, 1) != 0) in dib9000_fw_boot()
838 state->platform.risc.fw_is_running = 1; in dib9000_fw_boot()
840 if (dib9000_risc_check_version(state) != 0) in dib9000_fw_boot()
843 state->platform.risc.memcmd = 0xff; in dib9000_fw_boot()
893 static void dib9000_set_power_mode(struct dib9000_state *state, enum dib9000_power_mode mode) in dib9000_set_power_mode() argument
899 if (state->revision == 0x4003 || state->revision == 0x4004 || state->revision == 0x4005) in dib9000_set_power_mode()
904 reg_906 = dib9000_read_word(state, 906 + offset) | 0x3; /* keep settings for RISC */ in dib9000_set_power_mode()
946 if (!state->platform.host.mobile_mode) in dib9000_set_power_mode()
950 if (state->revision != 0x4000) in dib9000_set_power_mode()
953 dib9000_write_word(state, 903 + offset, reg_903); in dib9000_set_power_mode()
954 dib9000_write_word(state, 904 + offset, reg_904); in dib9000_set_power_mode()
955 dib9000_write_word(state, 905 + offset, reg_905); in dib9000_set_power_mode()
956 dib9000_write_word(state, 906 + offset, reg_906); in dib9000_set_power_mode()
961 struct dib9000_state *state = fe->demodulator_priv; in dib9000_fw_reset() local
963 dib9000_write_word(state, 1817, 0x0003); in dib9000_fw_reset()
965 dib9000_write_word(state, 1227, 1); in dib9000_fw_reset()
966 dib9000_write_word(state, 1227, 0); in dib9000_fw_reset()
968 switch ((state->revision = dib9000_identify(&state->i2c))) { in dib9000_fw_reset()
972 state->reg_offs = 1; in dib9000_fw_reset()
979 dibx000_reset_i2c_master(&state->i2c_master); in dib9000_fw_reset()
981 dib9000_set_power_mode(state, DIB9000_POWER_ALL); in dib9000_fw_reset()
984 dib9000_write_word(state, 1794, dib9000_read_word(state, 1794) & ~(1 << 1)); in dib9000_fw_reset()
985 dib9000_write_word(state, 1796, 0); in dib9000_fw_reset()
986 dib9000_write_word(state, 1805, 0x805); in dib9000_fw_reset()
989 dib9000_write_word(state, 898, 0xffff); in dib9000_fw_reset()
990 dib9000_write_word(state, 899, 0xffff); in dib9000_fw_reset()
991 dib9000_write_word(state, 900, 0x0001); in dib9000_fw_reset()
992 dib9000_write_word(state, 901, 0xff19); in dib9000_fw_reset()
993 dib9000_write_word(state, 902, 0x003c); in dib9000_fw_reset()
995 dib9000_write_word(state, 898, 0); in dib9000_fw_reset()
996 dib9000_write_word(state, 899, 0); in dib9000_fw_reset()
997 dib9000_write_word(state, 900, 0); in dib9000_fw_reset()
998 dib9000_write_word(state, 901, 0); in dib9000_fw_reset()
999 dib9000_write_word(state, 902, 0); in dib9000_fw_reset()
1001 dib9000_write_word(state, 911, state->chip.d9.cfg.if_drives); in dib9000_fw_reset()
1003 dib9000_set_power_mode(state, DIB9000_POWER_INTERFACE_ONLY); in dib9000_fw_reset()
1008 static int dib9000_risc_apb_access_read(struct dib9000_state *state, u32 address, u16 attribute, co… in dib9000_risc_apb_access_read() argument
1013 if (address >= 1024 || !state->platform.risc.fw_is_running) in dib9000_risc_apb_access_read()
1020 dib9000_mbx_send_attr(state, OUT_MSG_BRIDGE_APB_R, mb, 2, attribute); in dib9000_risc_apb_access_read()
1021 switch (dib9000_mbx_get_message_attr(state, IN_MSG_END_BRIDGE_APB_RW, mb, &s, attribute)) { in dib9000_risc_apb_access_read()
1035 static int dib9000_risc_apb_access_write(struct dib9000_state *state, u32 address, u16 attribute, c… in dib9000_risc_apb_access_write() argument
1040 if (address >= 1024 || !state->platform.risc.fw_is_running) in dib9000_risc_apb_access_write()
1049 dib9000_mbx_send_attr(state, OUT_MSG_BRIDGE_APB_W, mb, 1 + len / 2, attribute); in dib9000_risc_apb_access_write()
1050 …return dib9000_mbx_get_message_attr(state, IN_MSG_END_BRIDGE_APB_RW, mb, &s, attribute) == 1 ? 0 :… in dib9000_risc_apb_access_write()
1053 static int dib9000_fw_memmbx_sync(struct dib9000_state *state, u8 i) in dib9000_fw_memmbx_sync() argument
1057 if (!state->platform.risc.fw_is_running) in dib9000_fw_memmbx_sync()
1059 dib9000_risc_mem_write(state, FE_MM_RW_SYNC, &i); in dib9000_fw_memmbx_sync()
1061 dib9000_risc_mem_read(state, FE_MM_RW_SYNC, state->i2c_read_buffer, 1); in dib9000_fw_memmbx_sync()
1062 } while (state->i2c_read_buffer[0] && index_loop--); in dib9000_fw_memmbx_sync()
1069 static int dib9000_fw_init(struct dib9000_state *state) in dib9000_fw_init() argument
1076 …if (dib9000_fw_boot(state, NULL, 0, state->chip.d9.cfg.microcode_B_fe_buffer, state->chip.d9.cfg.m… in dib9000_fw_init()
1080 for (i = 0; i < ARRAY_SIZE(state->chip.d9.cfg.gpio_function); i++) { in dib9000_fw_init()
1081 f = &state->chip.d9.cfg.gpio_function[i]; in dib9000_fw_init()
1097 if (dib9000_mbx_send(state, OUT_MSG_CONF_GPIO, b, 15) != 0) in dib9000_fw_init()
1101 b[0] = state->chip.d9.cfg.subband.size; /* type == 0 -> GPIO - PWM not yet supported */ in dib9000_fw_init()
1102 for (i = 0; i < state->chip.d9.cfg.subband.size; i++) { in dib9000_fw_init()
1103 b[1 + i * 4] = state->chip.d9.cfg.subband.subband[i].f_mhz; in dib9000_fw_init()
1104 b[2 + i * 4] = (u16) state->chip.d9.cfg.subband.subband[i].gpio.mask; in dib9000_fw_init()
1105 b[3 + i * 4] = (u16) state->chip.d9.cfg.subband.subband[i].gpio.direction; in dib9000_fw_init()
1106 b[4 + i * 4] = (u16) state->chip.d9.cfg.subband.subband[i].gpio.value; in dib9000_fw_init()
1109 if (dib9000_mbx_send(state, OUT_MSG_SUBBAND_SEL, b, 2 + 4 * i) != 0) in dib9000_fw_init()
1116 b[2] = (u16) (((state->chip.d9.cfg.xtal_clock_khz * 1000) >> 16) & 0xffff); in dib9000_fw_init()
1117 b[3] = (u16) (((state->chip.d9.cfg.xtal_clock_khz * 1000)) & 0xffff); in dib9000_fw_init()
1118 b[4] = (u16) ((state->chip.d9.cfg.vcxo_timer >> 16) & 0xffff); in dib9000_fw_init()
1119 b[5] = (u16) ((state->chip.d9.cfg.vcxo_timer) & 0xffff); in dib9000_fw_init()
1120 b[6] = (u16) ((state->chip.d9.cfg.timing_frequency >> 16) & 0xffff); in dib9000_fw_init()
1121 b[7] = (u16) ((state->chip.d9.cfg.timing_frequency) & 0xffff); in dib9000_fw_init()
1122 b[29] = state->chip.d9.cfg.if_drives; in dib9000_fw_init()
1123 if (dib9000_mbx_send(state, OUT_MSG_INIT_DEMOD, b, ARRAY_SIZE(b)) != 0) in dib9000_fw_init()
1126 if (dib9000_mbx_send(state, OUT_MSG_FE_FW_DL, NULL, 0) != 0) in dib9000_fw_init()
1129 if (dib9000_mbx_get_message(state, IN_MSG_FE_FW_DL_DONE, b, &size) < 0) in dib9000_fw_init()
1139 state->platform.risc.fe_mm[i / 2].addr = b[i + 0]; in dib9000_fw_init()
1140 state->platform.risc.fe_mm[i / 2].size = b[i + 1]; in dib9000_fw_init()
1146 static void dib9000_fw_set_channel_head(struct dib9000_state *state) in dib9000_fw_set_channel_head() argument
1149 u32 freq = state->fe[0]->dtv_property_cache.frequency / 1000; in dib9000_fw_set_channel_head()
1150 if (state->fe_id % 2) in dib9000_fw_set_channel_head()
1157 b[4] = (u8) ((state->fe[0]->dtv_property_cache.bandwidth_hz / 1000 >> 0) & 0xff); in dib9000_fw_set_channel_head()
1158 b[5] = (u8) ((state->fe[0]->dtv_property_cache.bandwidth_hz / 1000 >> 8) & 0xff); in dib9000_fw_set_channel_head()
1159 b[6] = (u8) ((state->fe[0]->dtv_property_cache.bandwidth_hz / 1000 >> 16) & 0xff); in dib9000_fw_set_channel_head()
1160 b[7] = (u8) ((state->fe[0]->dtv_property_cache.bandwidth_hz / 1000 >> 24) & 0xff); in dib9000_fw_set_channel_head()
1162 if (state->fe[0]->dtv_property_cache.delivery_system == SYS_DVBT) in dib9000_fw_set_channel_head()
1164 dib9000_risc_mem_write(state, FE_MM_W_CHANNEL_HEAD, b); in dib9000_fw_set_channel_head()
1169 struct dib9000_state *state = fe->demodulator_priv; in dib9000_fw_get_channel() local
1188 if (mutex_lock_interruptible(&state->platform.risc.mem_mbx_lock) < 0) { in dib9000_fw_get_channel()
1192 if (dib9000_fw_memmbx_sync(state, FE_SYNC_CHANNEL) < 0) { in dib9000_fw_get_channel()
1197 dib9000_risc_mem_read(state, FE_MM_R_CHANNEL_UNION, in dib9000_fw_get_channel()
1198 state->i2c_read_buffer, sizeof(struct dibDVBTChannel)); in dib9000_fw_get_channel()
1199 ch = (struct dibDVBTChannel *)state->i2c_read_buffer; in dib9000_fw_get_channel()
1204 state->fe[0]->dtv_property_cache.inversion = INVERSION_ON; in dib9000_fw_get_channel()
1207 state->fe[0]->dtv_property_cache.inversion = INVERSION_OFF; in dib9000_fw_get_channel()
1211 state->fe[0]->dtv_property_cache.inversion = INVERSION_AUTO; in dib9000_fw_get_channel()
1216 state->fe[0]->dtv_property_cache.transmission_mode = TRANSMISSION_MODE_2K; in dib9000_fw_get_channel()
1219 state->fe[0]->dtv_property_cache.transmission_mode = TRANSMISSION_MODE_4K; in dib9000_fw_get_channel()
1222 state->fe[0]->dtv_property_cache.transmission_mode = TRANSMISSION_MODE_8K; in dib9000_fw_get_channel()
1226 state->fe[0]->dtv_property_cache.transmission_mode = TRANSMISSION_MODE_AUTO; in dib9000_fw_get_channel()
1231 state->fe[0]->dtv_property_cache.guard_interval = GUARD_INTERVAL_1_32; in dib9000_fw_get_channel()
1234 state->fe[0]->dtv_property_cache.guard_interval = GUARD_INTERVAL_1_16; in dib9000_fw_get_channel()
1237 state->fe[0]->dtv_property_cache.guard_interval = GUARD_INTERVAL_1_8; in dib9000_fw_get_channel()
1240 state->fe[0]->dtv_property_cache.guard_interval = GUARD_INTERVAL_1_4; in dib9000_fw_get_channel()
1244 state->fe[0]->dtv_property_cache.guard_interval = GUARD_INTERVAL_AUTO; in dib9000_fw_get_channel()
1249 state->fe[0]->dtv_property_cache.modulation = QAM_64; in dib9000_fw_get_channel()
1252 state->fe[0]->dtv_property_cache.modulation = QAM_16; in dib9000_fw_get_channel()
1255 state->fe[0]->dtv_property_cache.modulation = QPSK; in dib9000_fw_get_channel()
1259 state->fe[0]->dtv_property_cache.modulation = QAM_AUTO; in dib9000_fw_get_channel()
1264 state->fe[0]->dtv_property_cache.hierarchy = HIERARCHY_NONE; in dib9000_fw_get_channel()
1267 state->fe[0]->dtv_property_cache.hierarchy = HIERARCHY_1; in dib9000_fw_get_channel()
1271 state->fe[0]->dtv_property_cache.hierarchy = HIERARCHY_AUTO; in dib9000_fw_get_channel()
1276 state->fe[0]->dtv_property_cache.code_rate_HP = FEC_1_2; in dib9000_fw_get_channel()
1279 state->fe[0]->dtv_property_cache.code_rate_HP = FEC_2_3; in dib9000_fw_get_channel()
1282 state->fe[0]->dtv_property_cache.code_rate_HP = FEC_3_4; in dib9000_fw_get_channel()
1285 state->fe[0]->dtv_property_cache.code_rate_HP = FEC_5_6; in dib9000_fw_get_channel()
1288 state->fe[0]->dtv_property_cache.code_rate_HP = FEC_7_8; in dib9000_fw_get_channel()
1292 state->fe[0]->dtv_property_cache.code_rate_HP = FEC_AUTO; in dib9000_fw_get_channel()
1297 state->fe[0]->dtv_property_cache.code_rate_LP = FEC_1_2; in dib9000_fw_get_channel()
1300 state->fe[0]->dtv_property_cache.code_rate_LP = FEC_2_3; in dib9000_fw_get_channel()
1303 state->fe[0]->dtv_property_cache.code_rate_LP = FEC_3_4; in dib9000_fw_get_channel()
1306 state->fe[0]->dtv_property_cache.code_rate_LP = FEC_5_6; in dib9000_fw_get_channel()
1309 state->fe[0]->dtv_property_cache.code_rate_LP = FEC_7_8; in dib9000_fw_get_channel()
1313 state->fe[0]->dtv_property_cache.code_rate_LP = FEC_AUTO; in dib9000_fw_get_channel()
1318 mutex_unlock(&state->platform.risc.mem_mbx_lock); in dib9000_fw_get_channel()
1324 struct dib9000_state *state = fe->demodulator_priv; in dib9000_fw_set_channel_union() local
1342 switch (state->fe[0]->dtv_property_cache.inversion) { in dib9000_fw_set_channel_union()
1354 switch (state->fe[0]->dtv_property_cache.transmission_mode) { in dib9000_fw_set_channel_union()
1369 switch (state->fe[0]->dtv_property_cache.guard_interval) { in dib9000_fw_set_channel_union()
1387 switch (state->fe[0]->dtv_property_cache.modulation) { in dib9000_fw_set_channel_union()
1402 switch (state->fe[0]->dtv_property_cache.hierarchy) { in dib9000_fw_set_channel_union()
1417 switch (state->fe[0]->dtv_property_cache.code_rate_HP) { in dib9000_fw_set_channel_union()
1438 switch (state->fe[0]->dtv_property_cache.code_rate_LP) { in dib9000_fw_set_channel_union()
1462 dib9000_risc_mem_write(state, FE_MM_W_CHANNEL_UNION, (u8 *) &ch); in dib9000_fw_set_channel_union()
1469 struct dib9000_state *state = fe->demodulator_priv; in dib9000_fw_tune() local
1470 int ret = 10, search = state->channel_status.status == CHANNEL_STATUS_PARAMETERS_UNKNOWN; in dib9000_fw_tune()
1473 switch (state->tune_state) { in dib9000_fw_tune()
1475 dib9000_fw_set_channel_head(state); in dib9000_fw_tune()
1478 dib9000_risc_mem_write(state, FE_MM_W_CHANNEL_CONTEXT, (u8 *) fe_info); in dib9000_fw_tune()
1479 dib9000_risc_mem_write(state, FE_MM_W_FE_INFO, (u8 *) fe_info); in dib9000_fw_tune()
1482 dib9000_mbx_send(state, OUT_MSG_FE_CHANNEL_SEARCH, NULL, 0); in dib9000_fw_tune()
1485 dib9000_mbx_send(state, OUT_MSG_FE_CHANNEL_TUNE, NULL, 0); in dib9000_fw_tune()
1487 state->tune_state = CT_DEMOD_STEP_1; in dib9000_fw_tune()
1491 dib9000_risc_mem_read(state, FE_MM_R_CHANNEL_SEARCH_STATE, state->i2c_read_buffer, 1); in dib9000_fw_tune()
1493 dib9000_risc_mem_read(state, FE_MM_R_CHANNEL_TUNE_STATE, state->i2c_read_buffer, 1); in dib9000_fw_tune()
1494 i = (s8)state->i2c_read_buffer[0]; in dib9000_fw_tune()
1500 state->status = FE_STATUS_DEMOD_SUCCESS; in dib9000_fw_tune()
1502 state->tune_state = CT_DEMOD_STOP; in dib9000_fw_tune()
1503 state->status = FE_STATUS_LOCKED; in dib9000_fw_tune()
1507 state->status = FE_STATUS_TUNE_FAILED; in dib9000_fw_tune()
1508 state->tune_state = CT_DEMOD_STOP; in dib9000_fw_tune()
1522 struct dib9000_state *state = fe->demodulator_priv; in dib9000_fw_set_diversity_in() local
1524 return dib9000_mbx_send(state, OUT_MSG_ENABLE_DIVERSITY, &mode, 1); in dib9000_fw_set_diversity_in()
1529 struct dib9000_state *state = fe->demodulator_priv; in dib9000_fw_set_output_mode() local
1554 dprintk("Unhandled output_mode passed to be set for demod %p", &state->fe[0]); in dib9000_fw_set_output_mode()
1558 dib9000_write_word(state, 1795, outreg); in dib9000_fw_set_output_mode()
1565 smo_mode = (dib9000_read_word(state, 295) & 0x0010) | (1 << 1); in dib9000_fw_set_output_mode()
1566 if (state->chip.d9.cfg.output_mpeg2_in_188_bytes) in dib9000_fw_set_output_mode()
1568 dib9000_write_word(state, 295, smo_mode); in dib9000_fw_set_output_mode()
1573 return dib9000_mbx_send(state, OUT_MSG_SET_OUTPUT_MODE, &outreg, 1); in dib9000_fw_set_output_mode()
1578 struct dib9000_state *state = i2c_get_adapdata(i2c_adap); in dib9000_tuner_xfer() local
1587 if (dib9000_read_word(state, 790) != 0) in dib9000_tuner_xfer()
1590 dib9000_write_word(state, 784, (u16) (msg[index_msg].addr)); in dib9000_tuner_xfer()
1591 dib9000_write_word(state, 787, (len / 2) - 1); in dib9000_tuner_xfer()
1592 dib9000_write_word(state, 786, 1); /* start read */ in dib9000_tuner_xfer()
1595 while (dib9000_read_word(state, 790) != (len / 2) && i) in dib9000_tuner_xfer()
1602 t = dib9000_read_word(state, 785); in dib9000_tuner_xfer()
1606 if (dib9000_read_word(state, 790) != 0) in dib9000_tuner_xfer()
1610 while (dib9000_read_word(state, 789) && i) in dib9000_tuner_xfer()
1620 dib9000_write_word(state, 785, (msg[index_msg].buf[i] << 8) | msg[index_msg].buf[i + 1]); in dib9000_tuner_xfer()
1621 dib9000_write_word(state, 784, (u16) msg[index_msg].addr); in dib9000_tuner_xfer()
1622 dib9000_write_word(state, 787, (len / 2) - 1); in dib9000_tuner_xfer()
1623 dib9000_write_word(state, 786, 0); /* start write */ in dib9000_tuner_xfer()
1626 while (dib9000_read_word(state, 791) > 0 && i) in dib9000_tuner_xfer()
1637 struct dib9000_state *state = fe->demodulator_priv; in dib9000_fw_set_component_bus_speed() local
1639 state->component_bus_speed = speed; in dib9000_fw_set_component_bus_speed()
1646 struct dib9000_state *state = i2c_get_adapdata(i2c_adap); in dib9000_fw_component_bus_xfer() local
1649 u16 scl = state->component_bus_speed; /* SCL frequency */ in dib9000_fw_component_bus_xfer()
1650 struct dib9000_fe_memory_map *m = &state->platform.risc.fe_mm[FE_MM_RW_COMPONENT_ACCESS_BUFFER]; in dib9000_fw_component_bus_xfer()
1673 if (mutex_lock_interruptible(&state->platform.risc.mem_mbx_lock) < 0) { in dib9000_fw_component_bus_xfer()
1678 dib9000_risc_mem_write(state, FE_MM_W_COMPONENT_ACCESS, p); in dib9000_fw_component_bus_xfer()
1681 dib9000_risc_mem_setup_cmd(state, m->addr, msg[0].len, 0); in dib9000_fw_component_bus_xfer()
1682 dib9000_risc_mem_write_chunks(state, msg[0].buf, msg[0].len); in dib9000_fw_component_bus_xfer()
1686 if (dib9000_fw_memmbx_sync(state, FE_SYNC_COMPONENT_ACCESS) < 0) { in dib9000_fw_component_bus_xfer()
1687 mutex_unlock(&state->platform.risc.mem_mbx_lock); in dib9000_fw_component_bus_xfer()
1693 dib9000_risc_mem_read(state, FE_MM_RW_COMPONENT_ACCESS_BUFFER, msg[1].buf, msg[1].len); in dib9000_fw_component_bus_xfer()
1695 mutex_unlock(&state->platform.risc.mem_mbx_lock); in dib9000_fw_component_bus_xfer()
1764 struct dib9000_state *state = fe->demodulator_priv; in dib9000_set_gpio() local
1765 return dib9000_cfg_gpio(state, num, dir, val); in dib9000_set_gpio()
1771 struct dib9000_state *state = fe->demodulator_priv; in dib9000_fw_pid_filter_ctrl() local
1775 if ((state->pid_ctrl_index != -2) && (state->pid_ctrl_index < 9)) { in dib9000_fw_pid_filter_ctrl()
1778 state->pid_ctrl_index++; in dib9000_fw_pid_filter_ctrl()
1779 state->pid_ctrl[state->pid_ctrl_index].cmd = DIB9000_PID_FILTER_CTRL; in dib9000_fw_pid_filter_ctrl()
1780 state->pid_ctrl[state->pid_ctrl_index].onoff = onoff; in dib9000_fw_pid_filter_ctrl()
1784 if (mutex_lock_interruptible(&state->demod_lock) < 0) { in dib9000_fw_pid_filter_ctrl()
1789 val = dib9000_read_word(state, 294 + 1) & 0xffef; in dib9000_fw_pid_filter_ctrl()
1793 ret = dib9000_write_word(state, 294 + 1, val); in dib9000_fw_pid_filter_ctrl()
1794 mutex_unlock(&state->demod_lock); in dib9000_fw_pid_filter_ctrl()
1802 struct dib9000_state *state = fe->demodulator_priv; in dib9000_fw_pid_filter() local
1805 if (state->pid_ctrl_index != -2) { in dib9000_fw_pid_filter()
1808 if (state->pid_ctrl_index < 9) { in dib9000_fw_pid_filter()
1809 state->pid_ctrl_index++; in dib9000_fw_pid_filter()
1810 state->pid_ctrl[state->pid_ctrl_index].cmd = DIB9000_PID_FILTER; in dib9000_fw_pid_filter()
1811 state->pid_ctrl[state->pid_ctrl_index].id = id; in dib9000_fw_pid_filter()
1812 state->pid_ctrl[state->pid_ctrl_index].pid = pid; in dib9000_fw_pid_filter()
1813 state->pid_ctrl[state->pid_ctrl_index].onoff = onoff; in dib9000_fw_pid_filter()
1819 if (mutex_lock_interruptible(&state->demod_lock) < 0) { in dib9000_fw_pid_filter()
1824 ret = dib9000_write_word(state, 300 + 1 + id, in dib9000_fw_pid_filter()
1826 mutex_unlock(&state->demod_lock); in dib9000_fw_pid_filter()
1833 struct dib9000_state *state = fe->demodulator_priv; in dib9000_firmware_post_pll_init() local
1834 return dib9000_fw_init(state); in dib9000_firmware_post_pll_init()
1861 struct dib9000_state *state = fe->demodulator_priv; in dib9000_sleep() local
1865 if (mutex_lock_interruptible(&state->demod_lock) < 0) { in dib9000_sleep()
1869 …for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] … in dib9000_sleep()
1870 ret = state->fe[index_frontend]->ops.sleep(state->fe[index_frontend]); in dib9000_sleep()
1874 ret = dib9000_mbx_send(state, OUT_MSG_FE_SLEEP, NULL, 0); in dib9000_sleep()
1877 mutex_unlock(&state->demod_lock); in dib9000_sleep()
1889 struct dib9000_state *state = fe->demodulator_priv; in dib9000_get_frontend() local
1894 if (state->get_frontend_internal == 0) { in dib9000_get_frontend()
1895 if (mutex_lock_interruptible(&state->demod_lock) < 0) { in dib9000_get_frontend()
1901 …for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] … in dib9000_get_frontend()
1902 state->fe[index_frontend]->ops.read_status(state->fe[index_frontend], &stat); in dib9000_get_frontend()
1907 state->fe[index_frontend]->ops.get_frontend(state->fe[index_frontend]); in dib9000_get_frontend()
1908 …for (sub_index_frontend = 0; (sub_index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[sub_inde… in dib9000_get_frontend()
1911 state->fe[sub_index_frontend]->dtv_property_cache.modulation = in dib9000_get_frontend()
1912 state->fe[index_frontend]->dtv_property_cache.modulation; in dib9000_get_frontend()
1913 state->fe[sub_index_frontend]->dtv_property_cache.inversion = in dib9000_get_frontend()
1914 state->fe[index_frontend]->dtv_property_cache.inversion; in dib9000_get_frontend()
1915 state->fe[sub_index_frontend]->dtv_property_cache.transmission_mode = in dib9000_get_frontend()
1916 state->fe[index_frontend]->dtv_property_cache.transmission_mode; in dib9000_get_frontend()
1917 state->fe[sub_index_frontend]->dtv_property_cache.guard_interval = in dib9000_get_frontend()
1918 state->fe[index_frontend]->dtv_property_cache.guard_interval; in dib9000_get_frontend()
1919 state->fe[sub_index_frontend]->dtv_property_cache.hierarchy = in dib9000_get_frontend()
1920 state->fe[index_frontend]->dtv_property_cache.hierarchy; in dib9000_get_frontend()
1921 state->fe[sub_index_frontend]->dtv_property_cache.code_rate_HP = in dib9000_get_frontend()
1922 state->fe[index_frontend]->dtv_property_cache.code_rate_HP; in dib9000_get_frontend()
1923 state->fe[sub_index_frontend]->dtv_property_cache.code_rate_LP = in dib9000_get_frontend()
1924 state->fe[index_frontend]->dtv_property_cache.code_rate_LP; in dib9000_get_frontend()
1925 state->fe[sub_index_frontend]->dtv_property_cache.rolloff = in dib9000_get_frontend()
1926 state->fe[index_frontend]->dtv_property_cache.rolloff; in dib9000_get_frontend()
1940 …for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] … in dib9000_get_frontend()
1941 state->fe[index_frontend]->dtv_property_cache.inversion = fe->dtv_property_cache.inversion; in dib9000_get_frontend()
1942 …state->fe[index_frontend]->dtv_property_cache.transmission_mode = fe->dtv_property_cache.transmiss… in dib9000_get_frontend()
1943 …state->fe[index_frontend]->dtv_property_cache.guard_interval = fe->dtv_property_cache.guard_interv… in dib9000_get_frontend()
1944 state->fe[index_frontend]->dtv_property_cache.modulation = fe->dtv_property_cache.modulation; in dib9000_get_frontend()
1945 state->fe[index_frontend]->dtv_property_cache.hierarchy = fe->dtv_property_cache.hierarchy; in dib9000_get_frontend()
1946 state->fe[index_frontend]->dtv_property_cache.code_rate_HP = fe->dtv_property_cache.code_rate_HP; in dib9000_get_frontend()
1947 state->fe[index_frontend]->dtv_property_cache.code_rate_LP = fe->dtv_property_cache.code_rate_LP; in dib9000_get_frontend()
1948 state->fe[index_frontend]->dtv_property_cache.rolloff = fe->dtv_property_cache.rolloff; in dib9000_get_frontend()
1953 if (state->get_frontend_internal == 0) in dib9000_get_frontend()
1954 mutex_unlock(&state->demod_lock); in dib9000_get_frontend()
1960 struct dib9000_state *state = fe->demodulator_priv; in dib9000_set_tune_state() local
1961 state->tune_state = tune_state; in dib9000_set_tune_state()
1963 state->status = FE_STATUS_TUNE_PENDING; in dib9000_set_tune_state()
1970 struct dib9000_state *state = fe->demodulator_priv; in dib9000_get_status() local
1971 return state->status; in dib9000_get_status()
1976 struct dib9000_state *state = fe->demodulator_priv; in dib9000_set_channel_status() local
1978 memcpy(&state->channel_status, channel_status, sizeof(struct dvb_frontend_parametersContext)); in dib9000_set_channel_status()
1984 struct dib9000_state *state = fe->demodulator_priv; in dib9000_set_frontend() local
1991 if (state->fe[0]->dtv_property_cache.frequency == 0) { in dib9000_set_frontend()
1996 if (state->fe[0]->dtv_property_cache.bandwidth_hz == 0) { in dib9000_set_frontend()
2001 state->pid_ctrl_index = -1; /* postpone the pid filtering cmd */ in dib9000_set_frontend()
2002 if (mutex_lock_interruptible(&state->demod_lock) < 0) { in dib9000_set_frontend()
2010 if (state->fe[0]->dtv_property_cache.transmission_mode == TRANSMISSION_MODE_AUTO || in dib9000_set_frontend()
2011 state->fe[0]->dtv_property_cache.guard_interval == GUARD_INTERVAL_AUTO || in dib9000_set_frontend()
2012 state->fe[0]->dtv_property_cache.modulation == QAM_AUTO || in dib9000_set_frontend()
2013 state->fe[0]->dtv_property_cache.code_rate_HP == FEC_AUTO) { in dib9000_set_frontend()
2015 state->channel_status.status = CHANNEL_STATUS_PARAMETERS_UNKNOWN; in dib9000_set_frontend()
2017 state->channel_status.status = CHANNEL_STATUS_PARAMETERS_SET; in dib9000_set_frontend()
2020 …for (index_frontend = 0; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] … in dib9000_set_frontend()
2021 dib9000_fw_set_diversity_in(state->fe[index_frontend], 1); in dib9000_set_frontend()
2024 …memcpy(&state->fe[index_frontend]->dtv_property_cache, &fe->dtv_property_cache, sizeof(struct dtv_… in dib9000_set_frontend()
2026 state->fe[index_frontend]->dtv_property_cache.delivery_system = SYS_DVBT; in dib9000_set_frontend()
2027 dib9000_fw_set_output_mode(state->fe[index_frontend], OUTMODE_HIGH_Z); in dib9000_set_frontend()
2029 dib9000_set_channel_status(state->fe[index_frontend], &state->channel_status); in dib9000_set_frontend()
2030 dib9000_set_tune_state(state->fe[index_frontend], CT_DEMOD_START); in dib9000_set_frontend()
2037 sleep_time = dib9000_fw_tune(state->fe[0]); in dib9000_set_frontend()
2038 …for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] … in dib9000_set_frontend()
2039 sleep_time_slave = dib9000_fw_tune(state->fe[index_frontend]); in dib9000_set_frontend()
2053 …for (index_frontend = 0; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] … in dib9000_set_frontend()
2054 frontend_status = -dib9000_get_status(state->fe[index_frontend]); in dib9000_set_frontend()
2071 mutex_unlock(&state->demod_lock); in dib9000_set_frontend()
2073 state->pid_ctrl_index = -1; in dib9000_set_frontend()
2080 state->get_frontend_internal = 1; in dib9000_set_frontend()
2081 dib9000_get_frontend(state->fe[0]); in dib9000_set_frontend()
2082 state->get_frontend_internal = 0; in dib9000_set_frontend()
2086 …for (index_frontend = 0; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] … in dib9000_set_frontend()
2089 dib9000_set_channel_status(state->fe[index_frontend], &channel_status); in dib9000_set_frontend()
2090 dib9000_set_tune_state(state->fe[index_frontend], CT_DEMOD_START); in dib9000_set_frontend()
2095 …for (index_frontend = 0; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] … in dib9000_set_frontend()
2097 sleep_time_slave = dib9000_fw_tune(state->fe[index_frontend]); in dib9000_set_frontend()
2110 …for (index_frontend = 0; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] … in dib9000_set_frontend()
2112 frontend_status = -dib9000_get_status(state->fe[index_frontend]); in dib9000_set_frontend()
2120 dib9000_fw_set_output_mode(state->fe[0], state->chip.d9.cfg.output_mode); in dib9000_set_frontend()
2121 …for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] … in dib9000_set_frontend()
2122 dib9000_fw_set_output_mode(state->fe[index_frontend], OUTMODE_DIVERSITY); in dib9000_set_frontend()
2125 dib9000_fw_set_diversity_in(state->fe[index_frontend - 1], 0); in dib9000_set_frontend()
2127 mutex_unlock(&state->demod_lock); in dib9000_set_frontend()
2128 if (state->pid_ctrl_index >= 0) { in dib9000_set_frontend()
2130 u8 pid_ctrl_index = state->pid_ctrl_index; in dib9000_set_frontend()
2132 state->pid_ctrl_index = -2; in dib9000_set_frontend()
2136 if (state->pid_ctrl[index_pid_filter_cmd].cmd == DIB9000_PID_FILTER_CTRL) in dib9000_set_frontend()
2137 dib9000_fw_pid_filter_ctrl(state->fe[0], in dib9000_set_frontend()
2138 state->pid_ctrl[index_pid_filter_cmd].onoff); in dib9000_set_frontend()
2139 else if (state->pid_ctrl[index_pid_filter_cmd].cmd == DIB9000_PID_FILTER) in dib9000_set_frontend()
2140 dib9000_fw_pid_filter(state->fe[0], in dib9000_set_frontend()
2141 state->pid_ctrl[index_pid_filter_cmd].id, in dib9000_set_frontend()
2142 state->pid_ctrl[index_pid_filter_cmd].pid, in dib9000_set_frontend()
2143 state->pid_ctrl[index_pid_filter_cmd].onoff); in dib9000_set_frontend()
2147 state->pid_ctrl_index = -2; in dib9000_set_frontend()
2154 struct dib9000_state *state = fe->demodulator_priv; in dib9000_read_lock() local
2156 return dib9000_read_word(state, 535); in dib9000_read_lock()
2161 struct dib9000_state *state = fe->demodulator_priv; in dib9000_read_status() local
2165 if (mutex_lock_interruptible(&state->demod_lock) < 0) { in dib9000_read_status()
2169 …for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] … in dib9000_read_status()
2170 lock_slave |= dib9000_read_lock(state->fe[index_frontend]); in dib9000_read_status()
2172 lock = dib9000_read_word(state, 535); in dib9000_read_status()
2187 mutex_unlock(&state->demod_lock); in dib9000_read_status()
2194 struct dib9000_state *state = fe->demodulator_priv; in dib9000_read_ber() local
2198 if (mutex_lock_interruptible(&state->demod_lock) < 0) { in dib9000_read_ber()
2202 if (mutex_lock_interruptible(&state->platform.risc.mem_mbx_lock) < 0) { in dib9000_read_ber()
2207 if (dib9000_fw_memmbx_sync(state, FE_SYNC_CHANNEL) < 0) { in dib9000_read_ber()
2208 mutex_unlock(&state->platform.risc.mem_mbx_lock); in dib9000_read_ber()
2212 dib9000_risc_mem_read(state, FE_MM_R_FE_MONITOR, in dib9000_read_ber()
2213 state->i2c_read_buffer, 16 * 2); in dib9000_read_ber()
2214 mutex_unlock(&state->platform.risc.mem_mbx_lock); in dib9000_read_ber()
2216 c = (u16 *)state->i2c_read_buffer; in dib9000_read_ber()
2221 mutex_unlock(&state->demod_lock); in dib9000_read_ber()
2227 struct dib9000_state *state = fe->demodulator_priv; in dib9000_read_signal_strength() local
2229 u16 *c = (u16 *)state->i2c_read_buffer; in dib9000_read_signal_strength()
2233 if (mutex_lock_interruptible(&state->demod_lock) < 0) { in dib9000_read_signal_strength()
2238 …for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] … in dib9000_read_signal_strength()
2239 state->fe[index_frontend]->ops.read_signal_strength(state->fe[index_frontend], &val); in dib9000_read_signal_strength()
2246 if (mutex_lock_interruptible(&state->platform.risc.mem_mbx_lock) < 0) { in dib9000_read_signal_strength()
2251 if (dib9000_fw_memmbx_sync(state, FE_SYNC_CHANNEL) < 0) { in dib9000_read_signal_strength()
2252 mutex_unlock(&state->platform.risc.mem_mbx_lock); in dib9000_read_signal_strength()
2256 dib9000_risc_mem_read(state, FE_MM_R_FE_MONITOR, (u8 *) c, 16 * 2); in dib9000_read_signal_strength()
2257 mutex_unlock(&state->platform.risc.mem_mbx_lock); in dib9000_read_signal_strength()
2266 mutex_unlock(&state->demod_lock); in dib9000_read_signal_strength()
2272 struct dib9000_state *state = fe->demodulator_priv; in dib9000_get_snr() local
2273 u16 *c = (u16 *)state->i2c_read_buffer; in dib9000_get_snr()
2277 if (mutex_lock_interruptible(&state->platform.risc.mem_mbx_lock) < 0) { in dib9000_get_snr()
2281 if (dib9000_fw_memmbx_sync(state, FE_SYNC_CHANNEL) < 0) { in dib9000_get_snr()
2282 mutex_unlock(&state->platform.risc.mem_mbx_lock); in dib9000_get_snr()
2285 dib9000_risc_mem_read(state, FE_MM_R_FE_MONITOR, (u8 *) c, 16 * 2); in dib9000_get_snr()
2286 mutex_unlock(&state->platform.risc.mem_mbx_lock); in dib9000_get_snr()
2312 struct dib9000_state *state = fe->demodulator_priv; in dib9000_read_snr() local
2316 if (mutex_lock_interruptible(&state->demod_lock) < 0) { in dib9000_read_snr()
2321 …for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] … in dib9000_read_snr()
2322 snr_master += dib9000_get_snr(state->fe[index_frontend]); in dib9000_read_snr()
2330 mutex_unlock(&state->demod_lock); in dib9000_read_snr()
2337 struct dib9000_state *state = fe->demodulator_priv; in dib9000_read_unc_blocks() local
2338 u16 *c = (u16 *)state->i2c_read_buffer; in dib9000_read_unc_blocks()
2341 if (mutex_lock_interruptible(&state->demod_lock) < 0) { in dib9000_read_unc_blocks()
2345 if (mutex_lock_interruptible(&state->platform.risc.mem_mbx_lock) < 0) { in dib9000_read_unc_blocks()
2350 if (dib9000_fw_memmbx_sync(state, FE_SYNC_CHANNEL) < 0) { in dib9000_read_unc_blocks()
2351 mutex_unlock(&state->platform.risc.mem_mbx_lock); in dib9000_read_unc_blocks()
2355 dib9000_risc_mem_read(state, FE_MM_R_FE_MONITOR, (u8 *) c, 16 * 2); in dib9000_read_unc_blocks()
2356 mutex_unlock(&state->platform.risc.mem_mbx_lock); in dib9000_read_unc_blocks()
2361 mutex_unlock(&state->demod_lock); in dib9000_read_unc_blocks()
2436 struct dib9000_state *state = fe->demodulator_priv; in dib9000_set_slave_frontend() local
2439 while ((index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL)) in dib9000_set_slave_frontend()
2443 state->fe[index_frontend] = fe_slave; in dib9000_set_slave_frontend()
2454 struct dib9000_state *state = fe->demodulator_priv; in dib9000_remove_slave_frontend() local
2457 while ((index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL)) in dib9000_remove_slave_frontend()
2460 dprintk("remove slave fe %p (index %i)", state->fe[index_frontend - 1], index_frontend - 1); in dib9000_remove_slave_frontend()
2461 state->fe[index_frontend] = NULL; in dib9000_remove_slave_frontend()
2472 struct dib9000_state *state = fe->demodulator_priv; in dib9000_get_slave_frontend() local
2476 return state->fe[slave_index]; in dib9000_get_slave_frontend()