Lines Matching refs:state
76 static int mb86a16_write(struct mb86a16_state *state, u8 reg, u8 val) in mb86a16_write() argument
82 .addr = state->config->demod_address, in mb86a16_write()
90 state->config->demod_address, buf[0], buf[1]); in mb86a16_write()
92 ret = i2c_transfer(state->i2c_adap, &msg, 1); in mb86a16_write()
97 static int mb86a16_read(struct mb86a16_state *state, u8 reg, u8 *val) in mb86a16_read() argument
105 .addr = state->config->demod_address, in mb86a16_read()
110 .addr = state->config->demod_address, in mb86a16_read()
116 ret = i2c_transfer(state->i2c_adap, msg, 2); in mb86a16_read()
128 static int CNTM_set(struct mb86a16_state *state, in CNTM_set() argument
136 if (mb86a16_write(state, MB86A16_CNTMR, val) < 0) in CNTM_set()
146 static int smrt_set(struct mb86a16_state *state, int rate) in smrt_set() argument
152 m = 1 << state->deci; in smrt_set()
153 tmp = (8192 * state->master_clk - 2 * m * rate * 8192 + state->master_clk / 2) / state->master_clk; in smrt_set()
158 if (mb86a16_write(state, MB86A16_SRATE1, (state->deci << 2) | in smrt_set()
159 (state->csel << 1) | in smrt_set()
160 state->rsel) < 0) in smrt_set()
162 if (mb86a16_write(state, MB86A16_SRATE2, STOFS0) < 0) in smrt_set()
164 if (mb86a16_write(state, MB86A16_SRATE3, STOFS1) < 0) in smrt_set()
173 static int srst(struct mb86a16_state *state) in srst() argument
175 if (mb86a16_write(state, MB86A16_RESET, 0x04) < 0) in srst()
185 static int afcex_data_set(struct mb86a16_state *state, in afcex_data_set() argument
189 if (mb86a16_write(state, MB86A16_AFCEXL, AFCEX_L) < 0) in afcex_data_set()
191 if (mb86a16_write(state, MB86A16_AFCEXH, AFCEX_H) < 0) in afcex_data_set()
201 static int afcofs_data_set(struct mb86a16_state *state, in afcofs_data_set() argument
205 if (mb86a16_write(state, 0x58, AFCEX_L) < 0) in afcofs_data_set()
207 if (mb86a16_write(state, 0x59, AFCEX_H) < 0) in afcofs_data_set()
216 static int stlp_set(struct mb86a16_state *state, in stlp_set() argument
220 if (mb86a16_write(state, MB86A16_STRFILTCOEF1, (STRBS << 3) | (STRAS)) < 0) in stlp_set()
229 static int Vi_set(struct mb86a16_state *state, unsigned char ETH, unsigned char VIA) in Vi_set() argument
231 if (mb86a16_write(state, MB86A16_VISET2, 0x04) < 0) in Vi_set()
233 if (mb86a16_write(state, MB86A16_VISET3, 0xf5) < 0) in Vi_set()
242 static int initial_set(struct mb86a16_state *state) in initial_set() argument
244 if (stlp_set(state, 5, 7)) in initial_set()
248 if (afcex_data_set(state, 0, 0)) in initial_set()
252 if (afcofs_data_set(state, 0, 0)) in initial_set()
256 if (mb86a16_write(state, MB86A16_CRLFILTCOEF1, 0x16) < 0) in initial_set()
258 if (mb86a16_write(state, 0x2f, 0x21) < 0) in initial_set()
260 if (mb86a16_write(state, MB86A16_VIMAG, 0x38) < 0) in initial_set()
262 if (mb86a16_write(state, MB86A16_FAGCS1, 0x00) < 0) in initial_set()
264 if (mb86a16_write(state, MB86A16_FAGCS2, 0x1c) < 0) in initial_set()
266 if (mb86a16_write(state, MB86A16_FAGCS3, 0x20) < 0) in initial_set()
268 if (mb86a16_write(state, MB86A16_FAGCS4, 0x1e) < 0) in initial_set()
270 if (mb86a16_write(state, MB86A16_FAGCS5, 0x23) < 0) in initial_set()
272 if (mb86a16_write(state, 0x54, 0xff) < 0) in initial_set()
274 if (mb86a16_write(state, MB86A16_TSOUT, 0x00) < 0) in initial_set()
284 static int S01T_set(struct mb86a16_state *state, in S01T_set() argument
288 if (mb86a16_write(state, 0x33, (s1t << 3) | s0t) < 0) in S01T_set()
298 static int EN_set(struct mb86a16_state *state, in EN_set() argument
305 if (mb86a16_write(state, 0x49, val) < 0) in EN_set()
314 static int AFCEXEN_set(struct mb86a16_state *state, in AFCEXEN_set() argument
329 if (mb86a16_write(state, 0x2a, 0x02 | (afcexen << 5) | (AFCA << 2)) < 0) in AFCEXEN_set()
339 static int DAGC_data_set(struct mb86a16_state *state, in DAGC_data_set() argument
343 if (mb86a16_write(state, 0x2d, (DAGCA << 3) | DAGCW) < 0) in DAGC_data_set()
353 static void smrt_info_get(struct mb86a16_state *state, int rate) in smrt_info_get() argument
356 state->deci = 0; state->csel = 0; state->rsel = 0; in smrt_info_get()
358 state->deci = 0; state->csel = 0; state->rsel = 1; in smrt_info_get()
360 state->deci = 0; state->csel = 1; state->rsel = 0; in smrt_info_get()
362 state->deci = 0; state->csel = 1; state->rsel = 1; in smrt_info_get()
364 state->deci = 1; state->csel = 0; state->rsel = 0; in smrt_info_get()
366 state->deci = 1; state->csel = 0; state->rsel = 1; in smrt_info_get()
368 state->deci = 1; state->csel = 1; state->rsel = 0; in smrt_info_get()
370 state->deci = 1; state->csel = 1; state->rsel = 1; in smrt_info_get()
372 state->deci = 2; state->csel = 0; state->rsel = 0; in smrt_info_get()
374 state->deci = 2; state->csel = 0; state->rsel = 1; in smrt_info_get()
376 state->deci = 2; state->csel = 1; state->rsel = 0; in smrt_info_get()
378 state->deci = 2; state->csel = 1; state->rsel = 1; in smrt_info_get()
380 state->deci = 3; state->csel = 0; state->rsel = 0; in smrt_info_get()
382 state->deci = 3; state->csel = 0; state->rsel = 1; in smrt_info_get()
384 state->deci = 3; state->csel = 1; state->rsel = 0; in smrt_info_get()
386 state->deci = 3; state->csel = 1; state->rsel = 1; in smrt_info_get()
388 state->deci = 4; state->csel = 0; state->rsel = 0; in smrt_info_get()
390 state->deci = 4; state->csel = 0; state->rsel = 1; in smrt_info_get()
392 state->deci = 4; state->csel = 1; state->rsel = 0; in smrt_info_get()
394 state->deci = 4; state->csel = 1; state->rsel = 1; in smrt_info_get()
396 state->deci = 5; state->csel = 0; state->rsel = 0; in smrt_info_get()
398 state->deci = 5; state->csel = 0; state->rsel = 1; in smrt_info_get()
400 state->deci = 5; state->csel = 1; state->rsel = 0; in smrt_info_get()
402 state->deci = 5; state->csel = 1; state->rsel = 1; in smrt_info_get()
405 if (state->csel == 0) in smrt_info_get()
406 state->master_clk = 92000; in smrt_info_get()
408 state->master_clk = 61333; in smrt_info_get()
412 static int signal_det(struct mb86a16_state *state, in signal_det() argument
426 if (CNTM_set(state, 2, 1, 2) < 0) { in signal_det()
432 if (CNTM_set(state, 3, 1, 2) < 0) { in signal_det()
445 smrt_info_get(state, smrtd); in signal_det()
446 smrt_set(state, smrtd); in signal_det()
447 srst(state); in signal_det()
452 if (mb86a16_read(state, 0x37, &(S[i])) != 2) { in signal_det()
466 if (CNTM_set(state, 0, 1, 2) < 0) { in signal_det()
474 static int rf_val_set(struct mb86a16_state *state, in rf_val_set() argument
531 if (mb86a16_write(state, 0x21, rf_val[0]) < 0) in rf_val_set()
533 if (mb86a16_write(state, 0x22, rf_val[1]) < 0) in rf_val_set()
535 if (mb86a16_write(state, 0x23, rf_val[2]) < 0) in rf_val_set()
537 if (mb86a16_write(state, 0x24, rf_val[3]) < 0) in rf_val_set()
539 if (mb86a16_write(state, 0x25, 0x01) < 0) in rf_val_set()
549 static int afcerr_chk(struct mb86a16_state *state) in afcerr_chk() argument
555 if (mb86a16_read(state, 0x0e, &AFCM_L) != 2) in afcerr_chk()
557 if (mb86a16_read(state, 0x0f, &AFCM_H) != 2) in afcerr_chk()
566 afcerr = afcm * state->master_clk / 8192; in afcerr_chk()
575 static int dagcm_val_get(struct mb86a16_state *state) in dagcm_val_get() argument
580 if (mb86a16_read(state, 0x45, &DAGCM_L) != 2) in dagcm_val_get()
582 if (mb86a16_read(state, 0x46, &DAGCM_H) != 2) in dagcm_val_get()
597 struct mb86a16_state *state = fe->demodulator_priv; in mb86a16_read_status() local
601 if (mb86a16_read(state, MB86A16_SIG1, &stat) != 2) in mb86a16_read_status()
603 if (mb86a16_read(state, MB86A16_SIG2, &stat2) != 2) in mb86a16_read_status()
610 if (mb86a16_read(state, MB86A16_STATUS, &stat) != 2) in mb86a16_read_status()
618 if (mb86a16_read(state, MB86A16_FRAMESYNC, &stat) != 2) in mb86a16_read_status()
631 static int sync_chk(struct mb86a16_state *state, in sync_chk() argument
637 if (mb86a16_read(state, 0x0d, &val) != 2) in sync_chk()
651 static int freqerr_chk(struct mb86a16_state *state, in freqerr_chk() argument
664 if (mb86a16_read(state, 0x43, &CRM) != 2) in freqerr_chk()
673 if (mb86a16_read(state, 0x49, &temp1) != 2) in freqerr_chk()
678 if (mb86a16_read(state, 0x2a, &temp1) != 2) in freqerr_chk()
684 if (mb86a16_read(state, 0x0e, &AFCML) != 2) in freqerr_chk()
686 if (mb86a16_read(state, 0x0f, &AFCMH) != 2) in freqerr_chk()
689 if (mb86a16_read(state, 0x2b, &AFCML) != 2) in freqerr_chk()
691 if (mb86a16_read(state, 0x2c, &AFCMH) != 2) in freqerr_chk()
695 smrt_info_get(state, smrt); in freqerr_chk()
702 afcerr = afcm * state->master_clk / 8192; in freqerr_chk()
706 if (mb86a16_read(state, 0x22, &temp1) != 2) in freqerr_chk()
708 if (mb86a16_read(state, 0x23, &temp2) != 2) in freqerr_chk()
710 if (mb86a16_read(state, 0x24, &temp3) != 2) in freqerr_chk()
737 static unsigned char vco_dev_get(struct mb86a16_state *state, int smrt) in vco_dev_get() argument
749 static void swp_info_get(struct mb86a16_state *state, in swp_info_get() argument
774 AFCEX = *afcex_freq * 8192 / state->master_clk; in swp_info_get()
780 static int swp_freq_calcuation(struct mb86a16_state *state, int i, int v, int *V, int vmax, int vm… in swp_freq_calcuation() argument
928 static void swp_info_get2(struct mb86a16_state *state, in swp_info_get2() argument
949 AFCEX = *afcex_freq * 8192 / state->master_clk; in swp_info_get2()
954 static void afcex_info_get(struct mb86a16_state *state, in afcex_info_get() argument
961 AFCEX = afcex_freq * 8192 / state->master_clk; in afcex_info_get()
966 static int SEQ_set(struct mb86a16_state *state, unsigned char loop) in SEQ_set() argument
969 if (mb86a16_write(state, 0x32, 0x02 | (loop << 2)) < 0) { in SEQ_set()
977 static int iq_vt_set(struct mb86a16_state *state, unsigned char IQINV) in iq_vt_set() argument
980 if (mb86a16_write(state, 0x06, 0xdf | (IQINV << 5)) < 0) { in iq_vt_set()
988 static int FEC_srst(struct mb86a16_state *state) in FEC_srst() argument
990 if (mb86a16_write(state, MB86A16_RESET, 0x02) < 0) { in FEC_srst()
998 static int S2T_set(struct mb86a16_state *state, unsigned char S2T) in S2T_set() argument
1000 if (mb86a16_write(state, 0x34, 0x70 | S2T) < 0) { in S2T_set()
1008 static int S45T_set(struct mb86a16_state *state, unsigned char S4T, unsigned char S5T) in S45T_set() argument
1010 if (mb86a16_write(state, 0x35, 0x00 | (S5T << 4) | S4T) < 0) { in S45T_set()
1019 static int mb86a16_set_fe(struct mb86a16_state *state) in mb86a16_set_fe() argument
1063 dprintk(verbose, MB86A16_INFO, 1, "freq=%d Mhz, symbrt=%d Ksps", state->frequency, state->srate); in mb86a16_set_fe()
1066 swp_ofs = state->srate / 4; in mb86a16_set_fe()
1077 SEQ_set(state, 0); in mb86a16_set_fe()
1078 iq_vt_set(state, 0); in mb86a16_set_fe()
1089 if (initial_set(state) < 0) { in mb86a16_set_fe()
1093 if (DAGC_data_set(state, 3, 2) < 0) { in mb86a16_set_fe()
1097 if (EN_set(state, CREN, AFCEN) < 0) { in mb86a16_set_fe()
1101 if (AFCEXEN_set(state, AFCEXEN, state->srate) < 0) { in mb86a16_set_fe()
1105 if (CNTM_set(state, TIMINT1, TIMINT2, TIMEXT) < 0) { in mb86a16_set_fe()
1109 if (S01T_set(state, S1T, S0T) < 0) { in mb86a16_set_fe()
1113 smrt_info_get(state, state->srate); in mb86a16_set_fe()
1114 if (smrt_set(state, state->srate) < 0) { in mb86a16_set_fe()
1119 R = vco_dev_get(state, state->srate); in mb86a16_set_fe()
1121 fOSC_start = state->frequency; in mb86a16_set_fe()
1124 if (state->frequency % 2 == 0) { in mb86a16_set_fe()
1125 fOSC_start = state->frequency; in mb86a16_set_fe()
1127 fOSC_start = state->frequency + 1; in mb86a16_set_fe()
1129 fOSC_start = state->frequency - 1; in mb86a16_set_fe()
1145 (ftemp - state->frequency * 1000 >= fcp + state->srate / 4)) in mb86a16_set_fe()
1163 (state->frequency * 1000 - ftemp >= fcp + state->srate / 4)) in mb86a16_set_fe()
1168 wait_t = (8000 + state->srate / 2) / state->srate; in mb86a16_set_fe()
1182 swp_info_get(state, fOSC_start, state->srate, in mb86a16_set_fe()
1187 if (rf_val_set(state, fOSC, state->srate, R) < 0) { in mb86a16_set_fe()
1192 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) { in mb86a16_set_fe()
1196 if (srst(state) < 0) { in mb86a16_set_fe()
1202 if (mb86a16_read(state, 0x37, &SIG1) != 2) { in mb86a16_set_fe()
1207 swp_freq = swp_freq_calcuation(state, i, v, V, vmax, vmin, in mb86a16_set_fe()
1218 …((signal_dupl == 0) && (swp_freq > 0) && (ABS(swp_freq - state->frequency * 1000) < fcp + state->s… in mb86a16_set_fe()
1219 …A16_DEBUG, 1, "------ Signal detect ------ [swp_freq=[%07d, srate=%05d]]", swp_freq, state->srate); in mb86a16_set_fe()
1222 swp_info_get2(state, state->srate, R, swp_freq, in mb86a16_set_fe()
1226 if (rf_val_set(state, fOSC, state->srate, R) < 0) { in mb86a16_set_fe()
1230 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) { in mb86a16_set_fe()
1234 signal = signal_det(state, state->srate, &SIG1); in mb86a16_set_fe()
1240 smrt_info_get(state, state->srate); in mb86a16_set_fe()
1241 if (smrt_set(state, state->srate) < 0) { in mb86a16_set_fe()
1275 if (S01T_set(state, S1T, S0T) < 0) { in mb86a16_set_fe()
1279 smrt_info_get(state, state->srate); in mb86a16_set_fe()
1280 if (smrt_set(state, state->srate) < 0) { in mb86a16_set_fe()
1284 if (EN_set(state, CREN, AFCEN) < 0) { in mb86a16_set_fe()
1288 if (AFCEXEN_set(state, AFCEXEN, state->srate) < 0) { in mb86a16_set_fe()
1292 afcex_info_get(state, afcex_freq, &AFCEX_L, &AFCEX_H); in mb86a16_set_fe()
1293 if (afcofs_data_set(state, AFCEX_L, AFCEX_H) < 0) { in mb86a16_set_fe()
1297 if (srst(state) < 0) { in mb86a16_set_fe()
1302 wait_t = 200000 / state->master_clk + 200000 / state->srate; in mb86a16_set_fe()
1304 afcerr = afcerr_chk(state); in mb86a16_set_fe()
1310 if (state->srate >= 1500) in mb86a16_set_fe()
1311 smrt_d = state->srate / 3; in mb86a16_set_fe()
1313 smrt_d = state->srate / 2; in mb86a16_set_fe()
1314 smrt_info_get(state, smrt_d); in mb86a16_set_fe()
1315 if (smrt_set(state, smrt_d) < 0) { in mb86a16_set_fe()
1319 if (AFCEXEN_set(state, AFCEXEN, smrt_d) < 0) { in mb86a16_set_fe()
1323 R = vco_dev_get(state, smrt_d); in mb86a16_set_fe()
1324 if (DAGC_data_set(state, 2, 0) < 0) { in mb86a16_set_fe()
1329 temp_freq = swp_freq + (i - 1) * state->srate / 8; in mb86a16_set_fe()
1330 swp_info_get2(state, smrt_d, R, temp_freq, &afcex_freq, &fOSC, &AFCEX_L, &AFCEX_H); in mb86a16_set_fe()
1331 if (rf_val_set(state, fOSC, smrt_d, R) < 0) { in mb86a16_set_fe()
1335 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) { in mb86a16_set_fe()
1339 wait_t = 200000 / state->master_clk + 40000 / smrt_d; in mb86a16_set_fe()
1341 dagcm[i] = dagcm_val_get(state); in mb86a16_set_fe()
1347 temp_freq = swp_freq - 2 * state->srate / 8; in mb86a16_set_fe()
1348 swp_info_get2(state, smrt_d, R, temp_freq, &afcex_freq, &fOSC, &AFCEX_L, &AFCEX_H); in mb86a16_set_fe()
1349 if (rf_val_set(state, fOSC, smrt_d, R) < 0) { in mb86a16_set_fe()
1353 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) { in mb86a16_set_fe()
1357 wait_t = 200000 / state->master_clk + 40000 / smrt_d; in mb86a16_set_fe()
1359 dagcm[3] = dagcm_val_get(state); in mb86a16_set_fe()
1361 delta_freq = (dagcm[2] - dagcm[0] + dagcm[1] - dagcm[3]) * state->srate / 300; in mb86a16_set_fe()
1368 temp_freq = swp_freq + 2 * state->srate / 8; in mb86a16_set_fe()
1369 swp_info_get2(state, smrt_d, R, temp_freq, &afcex_freq, &fOSC, &AFCEX_L, &AFCEX_H); in mb86a16_set_fe()
1370 if (rf_val_set(state, fOSC, smrt_d, R) < 0) { in mb86a16_set_fe()
1374 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) { in mb86a16_set_fe()
1378 wait_t = 200000 / state->master_clk + 40000 / smrt_d; in mb86a16_set_fe()
1380 dagcm[3] = dagcm_val_get(state); in mb86a16_set_fe()
1382 delta_freq = (dagcm[2] - dagcm[0] + dagcm[3] - dagcm[1]) * state->srate / 300; in mb86a16_set_fe()
1392 if (ABS(state->frequency * 1000 - swp_freq) > 3800) { in mb86a16_set_fe()
1402 if (S01T_set(state, S1T, S0T) < 0) { in mb86a16_set_fe()
1406 if (DAGC_data_set(state, 0, 0) < 0) { in mb86a16_set_fe()
1410 R = vco_dev_get(state, state->srate); in mb86a16_set_fe()
1411 smrt_info_get(state, state->srate); in mb86a16_set_fe()
1412 if (smrt_set(state, state->srate) < 0) { in mb86a16_set_fe()
1416 if (EN_set(state, CREN, AFCEN) < 0) { in mb86a16_set_fe()
1420 if (AFCEXEN_set(state, AFCEXEN, state->srate) < 0) { in mb86a16_set_fe()
1424 swp_info_get2(state, state->srate, R, swp_freq, &afcex_freq, &fOSC, &AFCEX_L, &AFCEX_H); in mb86a16_set_fe()
1425 if (rf_val_set(state, fOSC, state->srate, R) < 0) { in mb86a16_set_fe()
1429 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) { in mb86a16_set_fe()
1433 if (srst(state) < 0) { in mb86a16_set_fe()
1437 wait_t = 7 + (10000 + state->srate / 2) / state->srate; in mb86a16_set_fe()
1441 if (mb86a16_read(state, 0x37, &SIG1) != 2) { in mb86a16_set_fe()
1448 wait_t = 7 + (917504 + state->srate / 2) / state->srate; in mb86a16_set_fe()
1451 wait_t = 7 + (1048576 + state->srate / 2) / state->srate; in mb86a16_set_fe()
1454 wait_t = 7 + (1310720 + state->srate / 2) / state->srate; in mb86a16_set_fe()
1457 wait_t = 7 + (1572864 + state->srate / 2) / state->srate; in mb86a16_set_fe()
1460 wait_t = 7 + (2097152 + state->srate / 2) / state->srate; in mb86a16_set_fe()
1463 S2T_set(state, S2T); in mb86a16_set_fe()
1464 S45T_set(state, S4T, S5T); in mb86a16_set_fe()
1465 Vi_set(state, ETH, VIA); in mb86a16_set_fe()
1466 srst(state); in mb86a16_set_fe()
1468 sync = sync_chk(state, &VIRM); in mb86a16_set_fe()
1474 wait_t = (786432 + state->srate / 2) / state->srate; in mb86a16_set_fe()
1476 wait_t = (1572864 + state->srate / 2) / state->srate; in mb86a16_set_fe()
1477 if (state->srate < 5000) in mb86a16_set_fe()
1483 if (sync_chk(state, &junk) == 0) { in mb86a16_set_fe()
1484 iq_vt_set(state, 1); in mb86a16_set_fe()
1485 FEC_srst(state); in mb86a16_set_fe()
1490 wait_t = (786432 + state->srate / 2) / state->srate; in mb86a16_set_fe()
1492 wait_t = (1572864 + state->srate / 2) / state->srate; in mb86a16_set_fe()
1494 SEQ_set(state, 1); in mb86a16_set_fe()
1497 SEQ_set(state, 1); in mb86a16_set_fe()
1506 sync = sync_chk(state, &junk); in mb86a16_set_fe()
1509 freqerr_chk(state, state->frequency, state->srate, 1); in mb86a16_set_fe()
1515 mb86a16_read(state, 0x15, &agcval); in mb86a16_set_fe()
1516 mb86a16_read(state, 0x26, &cnmval); in mb86a16_set_fe()
1525 struct mb86a16_state *state = fe->demodulator_priv; in mb86a16_send_diseqc_msg() local
1529 if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA) < 0) in mb86a16_send_diseqc_msg()
1531 if (mb86a16_write(state, MB86A16_DCCOUT, 0x00) < 0) in mb86a16_send_diseqc_msg()
1533 if (mb86a16_write(state, MB86A16_TONEOUT2, 0x04) < 0) in mb86a16_send_diseqc_msg()
1542 if (mb86a16_write(state, regs, cmd->msg[i]) < 0) in mb86a16_send_diseqc_msg()
1551 if (mb86a16_write(state, MB86A16_DCC1, i) < 0) in mb86a16_send_diseqc_msg()
1553 if (mb86a16_write(state, MB86A16_DCCOUT, MB86A16_DCCOUT_DISEN) < 0) in mb86a16_send_diseqc_msg()
1565 struct mb86a16_state *state = fe->demodulator_priv; in mb86a16_send_diseqc_burst() local
1569 if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA | in mb86a16_send_diseqc_burst()
1573 if (mb86a16_write(state, MB86A16_DCCOUT, MB86A16_DCCOUT_DISEN) < 0) in mb86a16_send_diseqc_burst()
1577 if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA | in mb86a16_send_diseqc_burst()
1580 if (mb86a16_write(state, MB86A16_DCCOUT, MB86A16_DCCOUT_DISEN) < 0) in mb86a16_send_diseqc_burst()
1593 struct mb86a16_state *state = fe->demodulator_priv; in mb86a16_set_tone() local
1597 if (mb86a16_write(state, MB86A16_TONEOUT2, 0x00) < 0) in mb86a16_set_tone()
1599 if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA | in mb86a16_set_tone()
1603 if (mb86a16_write(state, MB86A16_DCCOUT, MB86A16_DCCOUT_DISEN) < 0) in mb86a16_set_tone()
1607 if (mb86a16_write(state, MB86A16_TONEOUT2, 0x04) < 0) in mb86a16_set_tone()
1609 if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA) < 0) in mb86a16_set_tone()
1611 if (mb86a16_write(state, MB86A16_DCCOUT, 0x00) < 0) in mb86a16_set_tone()
1627 struct mb86a16_state *state = fe->demodulator_priv; in mb86a16_search() local
1629 state->frequency = p->frequency / 1000; in mb86a16_search()
1630 state->srate = p->symbol_rate / 1000; in mb86a16_search()
1632 if (!mb86a16_set_fe(state)) { in mb86a16_search()
1643 struct mb86a16_state *state = fe->demodulator_priv; in mb86a16_release() local
1644 kfree(state); in mb86a16_release()
1662 struct mb86a16_state *state = fe->demodulator_priv; in mb86a16_read_ber() local
1665 if (mb86a16_read(state, MB86A16_BERMON, &ber_mon) != 2) in mb86a16_read_ber()
1667 if (mb86a16_read(state, MB86A16_BERTAB, &ber_tab) != 2) in mb86a16_read_ber()
1669 if (mb86a16_read(state, MB86A16_BERLSB, &ber_lsb) != 2) in mb86a16_read_ber()
1671 if (mb86a16_read(state, MB86A16_BERMID, &ber_mid) != 2) in mb86a16_read_ber()
1673 if (mb86a16_read(state, MB86A16_BERMSB, &ber_msb) != 2) in mb86a16_read_ber()
1727 struct mb86a16_state *state = fe->demodulator_priv; in mb86a16_read_signal_strength() local
1730 if (mb86a16_read(state, MB86A16_AGCM, &agcm) != 2) { in mb86a16_read_signal_strength()
1773 struct mb86a16_state *state = fe->demodulator_priv; in mb86a16_read_snr() local
1779 if (mb86a16_read(state, 0x26, &cn) != 2) { in mb86a16_read_snr()
1800 struct mb86a16_state *state = fe->demodulator_priv; in mb86a16_read_ucblocks() local
1802 if (mb86a16_read(state, MB86A16_DISTMON, &dist) != 2) { in mb86a16_read_ucblocks()
1854 struct mb86a16_state *state = NULL; in mb86a16_attach() local
1856 state = kmalloc(sizeof(struct mb86a16_state), GFP_KERNEL); in mb86a16_attach()
1857 if (state == NULL) in mb86a16_attach()
1860 state->config = config; in mb86a16_attach()
1861 state->i2c_adap = i2c_adap; in mb86a16_attach()
1863 mb86a16_read(state, 0x7f, &dev_id); in mb86a16_attach()
1867 memcpy(&state->frontend.ops, &mb86a16_ops, sizeof(struct dvb_frontend_ops)); in mb86a16_attach()
1868 state->frontend.demodulator_priv = state; in mb86a16_attach()
1869 state->frontend.ops.set_voltage = state->config->set_voltage; in mb86a16_attach()
1871 return &state->frontend; in mb86a16_attach()
1873 kfree(state); in mb86a16_attach()