Lines Matching refs:pcr
65 void rtsx_pci_start_run(struct rtsx_pcr *pcr) in rtsx_pci_start_run() argument
68 if (pcr->remove_pci) in rtsx_pci_start_run()
71 if (pcr->state != PDEV_STAT_RUN) { in rtsx_pci_start_run()
72 pcr->state = PDEV_STAT_RUN; in rtsx_pci_start_run()
73 if (pcr->ops->enable_auto_blink) in rtsx_pci_start_run()
74 pcr->ops->enable_auto_blink(pcr); in rtsx_pci_start_run()
77 mod_delayed_work(system_wq, &pcr->idle_work, msecs_to_jiffies(200)); in rtsx_pci_start_run()
81 int rtsx_pci_write_register(struct rtsx_pcr *pcr, u16 addr, u8 mask, u8 data) in rtsx_pci_write_register() argument
90 rtsx_pci_writel(pcr, RTSX_HAIMR, val); in rtsx_pci_write_register()
93 val = rtsx_pci_readl(pcr, RTSX_HAIMR); in rtsx_pci_write_register()
105 int rtsx_pci_read_register(struct rtsx_pcr *pcr, u16 addr, u8 *data) in rtsx_pci_read_register() argument
111 rtsx_pci_writel(pcr, RTSX_HAIMR, val); in rtsx_pci_read_register()
114 val = rtsx_pci_readl(pcr, RTSX_HAIMR); in rtsx_pci_read_register()
129 int rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val) in rtsx_pci_write_phy_register() argument
134 rtsx_pci_init_cmd(pcr); in rtsx_pci_write_phy_register()
136 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PHYDATA0, 0xFF, (u8)val); in rtsx_pci_write_phy_register()
137 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PHYDATA1, 0xFF, (u8)(val >> 8)); in rtsx_pci_write_phy_register()
138 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PHYADDR, 0xFF, addr); in rtsx_pci_write_phy_register()
139 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PHYRWCTL, 0xFF, 0x81); in rtsx_pci_write_phy_register()
141 err = rtsx_pci_send_cmd(pcr, 100); in rtsx_pci_write_phy_register()
146 err = rtsx_pci_read_register(pcr, PHYRWCTL, &tmp); in rtsx_pci_write_phy_register()
163 int rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val) in rtsx_pci_read_phy_register() argument
169 rtsx_pci_init_cmd(pcr); in rtsx_pci_read_phy_register()
171 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PHYADDR, 0xFF, addr); in rtsx_pci_read_phy_register()
172 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PHYRWCTL, 0xFF, 0x80); in rtsx_pci_read_phy_register()
174 err = rtsx_pci_send_cmd(pcr, 100); in rtsx_pci_read_phy_register()
179 err = rtsx_pci_read_register(pcr, PHYRWCTL, &tmp); in rtsx_pci_read_phy_register()
192 rtsx_pci_init_cmd(pcr); in rtsx_pci_read_phy_register()
194 rtsx_pci_add_cmd(pcr, READ_REG_CMD, PHYDATA0, 0, 0); in rtsx_pci_read_phy_register()
195 rtsx_pci_add_cmd(pcr, READ_REG_CMD, PHYDATA1, 0, 0); in rtsx_pci_read_phy_register()
197 err = rtsx_pci_send_cmd(pcr, 100); in rtsx_pci_read_phy_register()
201 ptr = rtsx_pci_get_cmd_data(pcr); in rtsx_pci_read_phy_register()
211 void rtsx_pci_stop_cmd(struct rtsx_pcr *pcr) in rtsx_pci_stop_cmd() argument
213 rtsx_pci_writel(pcr, RTSX_HCBCTLR, STOP_CMD); in rtsx_pci_stop_cmd()
214 rtsx_pci_writel(pcr, RTSX_HDBCTLR, STOP_DMA); in rtsx_pci_stop_cmd()
216 rtsx_pci_write_register(pcr, DMACTL, 0x80, 0x80); in rtsx_pci_stop_cmd()
217 rtsx_pci_write_register(pcr, RBCTL, 0x80, 0x80); in rtsx_pci_stop_cmd()
221 void rtsx_pci_add_cmd(struct rtsx_pcr *pcr, in rtsx_pci_add_cmd() argument
226 u32 *ptr = (u32 *)(pcr->host_cmds_ptr); in rtsx_pci_add_cmd()
233 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_add_cmd()
234 ptr += pcr->ci; in rtsx_pci_add_cmd()
235 if (pcr->ci < (HOST_CMDS_BUF_LEN / 4)) { in rtsx_pci_add_cmd()
238 pcr->ci++; in rtsx_pci_add_cmd()
240 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_add_cmd()
244 void rtsx_pci_send_cmd_no_wait(struct rtsx_pcr *pcr) in rtsx_pci_send_cmd_no_wait() argument
248 rtsx_pci_writel(pcr, RTSX_HCBAR, pcr->host_cmds_addr); in rtsx_pci_send_cmd_no_wait()
250 val |= (u32)(pcr->ci * 4) & 0x00FFFFFF; in rtsx_pci_send_cmd_no_wait()
253 rtsx_pci_writel(pcr, RTSX_HCBCTLR, val); in rtsx_pci_send_cmd_no_wait()
257 int rtsx_pci_send_cmd(struct rtsx_pcr *pcr, int timeout) in rtsx_pci_send_cmd() argument
265 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_send_cmd()
268 pcr->done = &trans_done; in rtsx_pci_send_cmd()
269 pcr->trans_result = TRANS_NOT_READY; in rtsx_pci_send_cmd()
272 rtsx_pci_writel(pcr, RTSX_HCBAR, pcr->host_cmds_addr); in rtsx_pci_send_cmd()
274 val |= (u32)(pcr->ci * 4) & 0x00FFFFFF; in rtsx_pci_send_cmd()
277 rtsx_pci_writel(pcr, RTSX_HCBCTLR, val); in rtsx_pci_send_cmd()
279 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_send_cmd()
285 dev_dbg(&(pcr->pci->dev), "Timeout (%s %d)\n", in rtsx_pci_send_cmd()
291 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_send_cmd()
292 if (pcr->trans_result == TRANS_RESULT_FAIL) in rtsx_pci_send_cmd()
294 else if (pcr->trans_result == TRANS_RESULT_OK) in rtsx_pci_send_cmd()
296 else if (pcr->trans_result == TRANS_NO_DEVICE) in rtsx_pci_send_cmd()
298 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_send_cmd()
301 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_send_cmd()
302 pcr->done = NULL; in rtsx_pci_send_cmd()
303 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_send_cmd()
306 rtsx_pci_stop_cmd(pcr); in rtsx_pci_send_cmd()
308 if (pcr->finish_me) in rtsx_pci_send_cmd()
309 complete(pcr->finish_me); in rtsx_pci_send_cmd()
315 static void rtsx_pci_add_sg_tbl(struct rtsx_pcr *pcr, in rtsx_pci_add_sg_tbl() argument
318 u64 *ptr = (u64 *)(pcr->host_sg_tbl_ptr) + pcr->sgi; in rtsx_pci_add_sg_tbl()
322 dev_dbg(&(pcr->pci->dev), "DMA addr: 0x%x, Len: 0x%x\n", in rtsx_pci_add_sg_tbl()
330 pcr->sgi++; in rtsx_pci_add_sg_tbl()
333 int rtsx_pci_transfer_data(struct rtsx_pcr *pcr, struct scatterlist *sglist, in rtsx_pci_transfer_data() argument
347 dev_dbg(&(pcr->pci->dev), "--> %s: num_sg = %d\n", __func__, num_sg); in rtsx_pci_transfer_data()
350 if (pcr->remove_pci) in rtsx_pci_transfer_data()
364 count = dma_map_sg(&(pcr->pci->dev), sglist, num_sg, dma_dir); in rtsx_pci_transfer_data()
366 dev_err(&(pcr->pci->dev), "scatterlist map failed\n"); in rtsx_pci_transfer_data()
369 dev_dbg(&(pcr->pci->dev), "DMA mapping count: %d\n", count); in rtsx_pci_transfer_data()
372 pcr->sgi = 0; in rtsx_pci_transfer_data()
376 rtsx_pci_add_sg_tbl(pcr, addr, len, i == count - 1); in rtsx_pci_transfer_data()
379 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_transfer_data()
381 pcr->done = &trans_done; in rtsx_pci_transfer_data()
382 pcr->trans_result = TRANS_NOT_READY; in rtsx_pci_transfer_data()
384 rtsx_pci_writel(pcr, RTSX_HDBAR, pcr->host_sg_tbl_addr); in rtsx_pci_transfer_data()
385 rtsx_pci_writel(pcr, RTSX_HDBCTLR, val); in rtsx_pci_transfer_data()
387 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_transfer_data()
392 dev_dbg(&(pcr->pci->dev), "Timeout (%s %d)\n", in rtsx_pci_transfer_data()
398 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_transfer_data()
400 if (pcr->trans_result == TRANS_RESULT_FAIL) in rtsx_pci_transfer_data()
402 else if (pcr->trans_result == TRANS_NO_DEVICE) in rtsx_pci_transfer_data()
405 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_transfer_data()
408 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_transfer_data()
409 pcr->done = NULL; in rtsx_pci_transfer_data()
410 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_transfer_data()
412 dma_unmap_sg(&(pcr->pci->dev), sglist, num_sg, dma_dir); in rtsx_pci_transfer_data()
415 rtsx_pci_stop_cmd(pcr); in rtsx_pci_transfer_data()
417 if (pcr->finish_me) in rtsx_pci_transfer_data()
418 complete(pcr->finish_me); in rtsx_pci_transfer_data()
424 int rtsx_pci_read_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len) in rtsx_pci_read_ppbuf() argument
437 rtsx_pci_init_cmd(pcr); in rtsx_pci_read_ppbuf()
440 rtsx_pci_add_cmd(pcr, READ_REG_CMD, reg++, 0, 0); in rtsx_pci_read_ppbuf()
442 err = rtsx_pci_send_cmd(pcr, 250); in rtsx_pci_read_ppbuf()
446 memcpy(ptr, rtsx_pci_get_cmd_data(pcr), 256); in rtsx_pci_read_ppbuf()
451 rtsx_pci_init_cmd(pcr); in rtsx_pci_read_ppbuf()
454 rtsx_pci_add_cmd(pcr, READ_REG_CMD, reg++, 0, 0); in rtsx_pci_read_ppbuf()
456 err = rtsx_pci_send_cmd(pcr, 250); in rtsx_pci_read_ppbuf()
461 memcpy(ptr, rtsx_pci_get_cmd_data(pcr), buf_len % 256); in rtsx_pci_read_ppbuf()
467 int rtsx_pci_write_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len) in rtsx_pci_write_ppbuf() argument
480 rtsx_pci_init_cmd(pcr); in rtsx_pci_write_ppbuf()
483 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in rtsx_pci_write_ppbuf()
488 err = rtsx_pci_send_cmd(pcr, 250); in rtsx_pci_write_ppbuf()
494 rtsx_pci_init_cmd(pcr); in rtsx_pci_write_ppbuf()
497 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in rtsx_pci_write_ppbuf()
502 err = rtsx_pci_send_cmd(pcr, 250); in rtsx_pci_write_ppbuf()
511 static int rtsx_pci_set_pull_ctl(struct rtsx_pcr *pcr, const u32 *tbl) in rtsx_pci_set_pull_ctl() argument
515 rtsx_pci_init_cmd(pcr); in rtsx_pci_set_pull_ctl()
518 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in rtsx_pci_set_pull_ctl()
523 err = rtsx_pci_send_cmd(pcr, 100); in rtsx_pci_set_pull_ctl()
530 int rtsx_pci_card_pull_ctl_enable(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_pull_ctl_enable() argument
535 tbl = pcr->sd_pull_ctl_enable_tbl; in rtsx_pci_card_pull_ctl_enable()
537 tbl = pcr->ms_pull_ctl_enable_tbl; in rtsx_pci_card_pull_ctl_enable()
541 return rtsx_pci_set_pull_ctl(pcr, tbl); in rtsx_pci_card_pull_ctl_enable()
545 int rtsx_pci_card_pull_ctl_disable(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_pull_ctl_disable() argument
550 tbl = pcr->sd_pull_ctl_disable_tbl; in rtsx_pci_card_pull_ctl_disable()
552 tbl = pcr->ms_pull_ctl_disable_tbl; in rtsx_pci_card_pull_ctl_disable()
557 return rtsx_pci_set_pull_ctl(pcr, tbl); in rtsx_pci_card_pull_ctl_disable()
561 static void rtsx_pci_enable_bus_int(struct rtsx_pcr *pcr) in rtsx_pci_enable_bus_int() argument
563 pcr->bier = TRANS_OK_INT_EN | TRANS_FAIL_INT_EN | SD_INT_EN; in rtsx_pci_enable_bus_int()
565 if (pcr->num_slots > 1) in rtsx_pci_enable_bus_int()
566 pcr->bier |= MS_INT_EN; in rtsx_pci_enable_bus_int()
569 rtsx_pci_writel(pcr, RTSX_BIER, pcr->bier); in rtsx_pci_enable_bus_int()
571 dev_dbg(&(pcr->pci->dev), "RTSX_BIER: 0x%08x\n", pcr->bier); in rtsx_pci_enable_bus_int()
591 int rtsx_pci_switch_clock(struct rtsx_pcr *pcr, unsigned int card_clock, in rtsx_pci_switch_clock() argument
611 err = rtsx_pci_write_register(pcr, SD_CFG1, in rtsx_pci_switch_clock()
617 dev_dbg(&(pcr->pci->dev), "Switch card clock to %dMHz\n", card_clock); in rtsx_pci_switch_clock()
622 dev_dbg(&(pcr->pci->dev), in rtsx_pci_switch_clock()
624 clk, pcr->cur_clock); in rtsx_pci_switch_clock()
626 if (clk == pcr->cur_clock) in rtsx_pci_switch_clock()
629 if (pcr->ops->conv_clk_and_div_n) in rtsx_pci_switch_clock()
630 n = (u8)pcr->ops->conv_clk_and_div_n(clk, CLK_TO_DIV_N); in rtsx_pci_switch_clock()
643 if (pcr->ops->conv_clk_and_div_n) { in rtsx_pci_switch_clock()
644 int dbl_clk = pcr->ops->conv_clk_and_div_n(n, in rtsx_pci_switch_clock()
646 n = (u8)pcr->ops->conv_clk_and_div_n(dbl_clk, in rtsx_pci_switch_clock()
653 dev_dbg(&(pcr->pci->dev), "n = %d, div = %d\n", n, div); in rtsx_pci_switch_clock()
660 dev_dbg(&(pcr->pci->dev), "ssc_depth = %d\n", ssc_depth); in rtsx_pci_switch_clock()
662 rtsx_pci_init_cmd(pcr); in rtsx_pci_switch_clock()
663 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, in rtsx_pci_switch_clock()
665 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_DIV, in rtsx_pci_switch_clock()
667 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, 0); in rtsx_pci_switch_clock()
668 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, in rtsx_pci_switch_clock()
670 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_DIV_N_0, 0xFF, n); in rtsx_pci_switch_clock()
671 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, SSC_RSTB); in rtsx_pci_switch_clock()
673 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rtsx_pci_switch_clock()
675 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rtsx_pci_switch_clock()
679 err = rtsx_pci_send_cmd(pcr, 2000); in rtsx_pci_switch_clock()
685 err = rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, 0); in rtsx_pci_switch_clock()
689 pcr->cur_clock = clk; in rtsx_pci_switch_clock()
694 int rtsx_pci_card_power_on(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_power_on() argument
696 if (pcr->ops->card_power_on) in rtsx_pci_card_power_on()
697 return pcr->ops->card_power_on(pcr, card); in rtsx_pci_card_power_on()
703 int rtsx_pci_card_power_off(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_power_off() argument
705 if (pcr->ops->card_power_off) in rtsx_pci_card_power_off()
706 return pcr->ops->card_power_off(pcr, card); in rtsx_pci_card_power_off()
712 int rtsx_pci_card_exclusive_check(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_exclusive_check() argument
719 if (!pcr->ms_pmos) { in rtsx_pci_card_exclusive_check()
723 if (pcr->card_exist & (~cd_mask[card])) in rtsx_pci_card_exclusive_check()
731 int rtsx_pci_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage) in rtsx_pci_switch_output_voltage() argument
733 if (pcr->ops->switch_output_voltage) in rtsx_pci_switch_output_voltage()
734 return pcr->ops->switch_output_voltage(pcr, voltage); in rtsx_pci_switch_output_voltage()
740 unsigned int rtsx_pci_card_exist(struct rtsx_pcr *pcr) in rtsx_pci_card_exist() argument
744 val = rtsx_pci_readl(pcr, RTSX_BIPR); in rtsx_pci_card_exist()
745 if (pcr->ops->cd_deglitch) in rtsx_pci_card_exist()
746 val = pcr->ops->cd_deglitch(pcr); in rtsx_pci_card_exist()
752 void rtsx_pci_complete_unfinished_transfer(struct rtsx_pcr *pcr) in rtsx_pci_complete_unfinished_transfer() argument
756 pcr->finish_me = &finish; in rtsx_pci_complete_unfinished_transfer()
759 if (pcr->done) in rtsx_pci_complete_unfinished_transfer()
760 complete(pcr->done); in rtsx_pci_complete_unfinished_transfer()
762 if (!pcr->remove_pci) in rtsx_pci_complete_unfinished_transfer()
763 rtsx_pci_stop_cmd(pcr); in rtsx_pci_complete_unfinished_transfer()
767 pcr->finish_me = NULL; in rtsx_pci_complete_unfinished_transfer()
774 struct rtsx_pcr *pcr; in rtsx_pci_card_detect() local
780 pcr = container_of(dwork, struct rtsx_pcr, carddet_work); in rtsx_pci_card_detect()
782 dev_dbg(&(pcr->pci->dev), "--> %s\n", __func__); in rtsx_pci_card_detect()
784 mutex_lock(&pcr->pcr_mutex); in rtsx_pci_card_detect()
785 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_card_detect()
787 irq_status = rtsx_pci_readl(pcr, RTSX_BIPR); in rtsx_pci_card_detect()
788 dev_dbg(&(pcr->pci->dev), "irq_status: 0x%08x\n", irq_status); in rtsx_pci_card_detect()
791 card_inserted = pcr->card_inserted & irq_status; in rtsx_pci_card_detect()
792 card_removed = pcr->card_removed; in rtsx_pci_card_detect()
793 pcr->card_inserted = 0; in rtsx_pci_card_detect()
794 pcr->card_removed = 0; in rtsx_pci_card_detect()
796 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_card_detect()
799 dev_dbg(&(pcr->pci->dev), in rtsx_pci_card_detect()
803 if (pcr->ops->cd_deglitch) in rtsx_pci_card_detect()
804 card_inserted = pcr->ops->cd_deglitch(pcr); in rtsx_pci_card_detect()
808 pcr->card_exist |= card_inserted; in rtsx_pci_card_detect()
809 pcr->card_exist &= ~card_removed; in rtsx_pci_card_detect()
812 mutex_unlock(&pcr->pcr_mutex); in rtsx_pci_card_detect()
814 if ((card_detect & SD_EXIST) && pcr->slots[RTSX_SD_CARD].card_event) in rtsx_pci_card_detect()
815 pcr->slots[RTSX_SD_CARD].card_event( in rtsx_pci_card_detect()
816 pcr->slots[RTSX_SD_CARD].p_dev); in rtsx_pci_card_detect()
817 if ((card_detect & MS_EXIST) && pcr->slots[RTSX_MS_CARD].card_event) in rtsx_pci_card_detect()
818 pcr->slots[RTSX_MS_CARD].card_event( in rtsx_pci_card_detect()
819 pcr->slots[RTSX_MS_CARD].p_dev); in rtsx_pci_card_detect()
824 struct rtsx_pcr *pcr = dev_id; in rtsx_pci_isr() local
827 if (!pcr) in rtsx_pci_isr()
830 spin_lock(&pcr->lock); in rtsx_pci_isr()
832 int_reg = rtsx_pci_readl(pcr, RTSX_BIPR); in rtsx_pci_isr()
834 rtsx_pci_writel(pcr, RTSX_BIPR, int_reg); in rtsx_pci_isr()
835 if ((int_reg & pcr->bier) == 0) { in rtsx_pci_isr()
836 spin_unlock(&pcr->lock); in rtsx_pci_isr()
840 spin_unlock(&pcr->lock); in rtsx_pci_isr()
844 int_reg &= (pcr->bier | 0x7FFFFF); in rtsx_pci_isr()
848 pcr->card_inserted |= SD_EXIST; in rtsx_pci_isr()
850 pcr->card_removed |= SD_EXIST; in rtsx_pci_isr()
851 pcr->card_inserted &= ~SD_EXIST; in rtsx_pci_isr()
857 pcr->card_inserted |= MS_EXIST; in rtsx_pci_isr()
859 pcr->card_removed |= MS_EXIST; in rtsx_pci_isr()
860 pcr->card_inserted &= ~MS_EXIST; in rtsx_pci_isr()
866 pcr->trans_result = TRANS_RESULT_FAIL; in rtsx_pci_isr()
867 if (pcr->done) in rtsx_pci_isr()
868 complete(pcr->done); in rtsx_pci_isr()
870 pcr->trans_result = TRANS_RESULT_OK; in rtsx_pci_isr()
871 if (pcr->done) in rtsx_pci_isr()
872 complete(pcr->done); in rtsx_pci_isr()
876 if (pcr->card_inserted || pcr->card_removed) in rtsx_pci_isr()
877 schedule_delayed_work(&pcr->carddet_work, in rtsx_pci_isr()
880 spin_unlock(&pcr->lock); in rtsx_pci_isr()
884 static int rtsx_pci_acquire_irq(struct rtsx_pcr *pcr) in rtsx_pci_acquire_irq() argument
886 dev_info(&(pcr->pci->dev), "%s: pcr->msi_en = %d, pci->irq = %d\n", in rtsx_pci_acquire_irq()
887 __func__, pcr->msi_en, pcr->pci->irq); in rtsx_pci_acquire_irq()
889 if (request_irq(pcr->pci->irq, rtsx_pci_isr, in rtsx_pci_acquire_irq()
890 pcr->msi_en ? 0 : IRQF_SHARED, in rtsx_pci_acquire_irq()
891 DRV_NAME_RTSX_PCI, pcr)) { in rtsx_pci_acquire_irq()
892 dev_err(&(pcr->pci->dev), in rtsx_pci_acquire_irq()
894 pcr->pci->irq); in rtsx_pci_acquire_irq()
898 pcr->irq = pcr->pci->irq; in rtsx_pci_acquire_irq()
899 pci_intx(pcr->pci, !pcr->msi_en); in rtsx_pci_acquire_irq()
907 struct rtsx_pcr *pcr = container_of(dwork, struct rtsx_pcr, idle_work); in rtsx_pci_idle_work() local
909 dev_dbg(&(pcr->pci->dev), "--> %s\n", __func__); in rtsx_pci_idle_work()
911 mutex_lock(&pcr->pcr_mutex); in rtsx_pci_idle_work()
913 pcr->state = PDEV_STAT_IDLE; in rtsx_pci_idle_work()
915 if (pcr->ops->disable_auto_blink) in rtsx_pci_idle_work()
916 pcr->ops->disable_auto_blink(pcr); in rtsx_pci_idle_work()
917 if (pcr->ops->turn_off_led) in rtsx_pci_idle_work()
918 pcr->ops->turn_off_led(pcr); in rtsx_pci_idle_work()
920 mutex_unlock(&pcr->pcr_mutex); in rtsx_pci_idle_work()
923 static int rtsx_pci_init_hw(struct rtsx_pcr *pcr) in rtsx_pci_init_hw() argument
927 rtsx_pci_writel(pcr, RTSX_HCBAR, pcr->host_cmds_addr); in rtsx_pci_init_hw()
929 rtsx_pci_enable_bus_int(pcr); in rtsx_pci_init_hw()
932 err = rtsx_pci_write_register(pcr, FPDCTL, SSC_POWER_DOWN, 0); in rtsx_pci_init_hw()
939 if (pcr->ops->optimize_phy) { in rtsx_pci_init_hw()
940 err = pcr->ops->optimize_phy(pcr); in rtsx_pci_init_hw()
945 rtsx_pci_init_cmd(pcr); in rtsx_pci_init_hw()
948 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_DIV, 0x07, 0x07); in rtsx_pci_init_hw()
950 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, HOST_SLEEP_STATE, 0x03, 0x00); in rtsx_pci_init_hw()
952 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_EN, 0x1E, 0); in rtsx_pci_init_hw()
954 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, ASPM_FORCE_CTL, 0x3F, 0); in rtsx_pci_init_hw()
956 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CHANGE_LINK_STATE, 0x0A, 0); in rtsx_pci_init_hw()
958 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_DRIVE_SEL, in rtsx_pci_init_hw()
961 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, in rtsx_pci_init_hw()
963 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, 0xFF, 0x12); in rtsx_pci_init_hw()
965 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CHANGE_LINK_STATE, 0x16, 0x10); in rtsx_pci_init_hw()
967 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, IRQSTAT0, in rtsx_pci_init_hw()
972 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PERST_GLITCH_WIDTH, 0xFF, 0x80); in rtsx_pci_init_hw()
977 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, RCCTL, 0x01, 0x00); in rtsx_pci_init_hw()
983 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, NFTS_TX_CTRL, 0x02, 0); in rtsx_pci_init_hw()
985 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0x08, 0x08); in rtsx_pci_init_hw()
987 err = rtsx_pci_send_cmd(pcr, 100); in rtsx_pci_init_hw()
992 rtsx_pci_write_config_byte(pcr, 0x81, 1); in rtsx_pci_init_hw()
994 rtsx_pci_write_config_byte(pcr, 0x70F, 0x5B); in rtsx_pci_init_hw()
996 if (pcr->ops->extra_init_hw) { in rtsx_pci_init_hw()
997 err = pcr->ops->extra_init_hw(pcr); in rtsx_pci_init_hw()
1005 if (pcr->ops->cd_deglitch) in rtsx_pci_init_hw()
1006 pcr->card_exist = pcr->ops->cd_deglitch(pcr); in rtsx_pci_init_hw()
1008 pcr->card_exist = rtsx_pci_readl(pcr, RTSX_BIPR) & CARD_EXIST; in rtsx_pci_init_hw()
1013 static int rtsx_pci_init_chip(struct rtsx_pcr *pcr) in rtsx_pci_init_chip() argument
1017 spin_lock_init(&pcr->lock); in rtsx_pci_init_chip()
1018 mutex_init(&pcr->pcr_mutex); in rtsx_pci_init_chip()
1020 switch (PCI_PID(pcr)) { in rtsx_pci_init_chip()
1023 rts5209_init_params(pcr); in rtsx_pci_init_chip()
1027 rts5229_init_params(pcr); in rtsx_pci_init_chip()
1031 rtl8411_init_params(pcr); in rtsx_pci_init_chip()
1035 rts5227_init_params(pcr); in rtsx_pci_init_chip()
1039 rts5249_init_params(pcr); in rtsx_pci_init_chip()
1043 dev_dbg(&(pcr->pci->dev), "PID: 0x%04x, IC version: 0x%02x\n", in rtsx_pci_init_chip()
1044 PCI_PID(pcr), pcr->ic_version); in rtsx_pci_init_chip()
1046 pcr->slots = kcalloc(pcr->num_slots, sizeof(struct rtsx_slot), in rtsx_pci_init_chip()
1048 if (!pcr->slots) in rtsx_pci_init_chip()
1051 pcr->state = PDEV_STAT_IDLE; in rtsx_pci_init_chip()
1052 err = rtsx_pci_init_hw(pcr); in rtsx_pci_init_chip()
1054 kfree(pcr->slots); in rtsx_pci_init_chip()
1064 struct rtsx_pcr *pcr; in rtsx_pci_probe() local
1086 pcr = kzalloc(sizeof(*pcr), GFP_KERNEL); in rtsx_pci_probe()
1087 if (!pcr) { in rtsx_pci_probe()
1097 handle->pcr = pcr; in rtsx_pci_probe()
1101 ret = idr_alloc(&rtsx_pci_idr, pcr, 0, 0, GFP_NOWAIT); in rtsx_pci_probe()
1103 pcr->id = ret; in rtsx_pci_probe()
1109 pcr->pci = pcidev; in rtsx_pci_probe()
1114 pcr->remap_addr = ioremap_nocache(base, len); in rtsx_pci_probe()
1115 if (!pcr->remap_addr) { in rtsx_pci_probe()
1120 pcr->rtsx_resv_buf = dma_alloc_coherent(&(pcidev->dev), in rtsx_pci_probe()
1121 RTSX_RESV_BUF_LEN, &(pcr->rtsx_resv_buf_addr), in rtsx_pci_probe()
1123 if (pcr->rtsx_resv_buf == NULL) { in rtsx_pci_probe()
1127 pcr->host_cmds_ptr = pcr->rtsx_resv_buf; in rtsx_pci_probe()
1128 pcr->host_cmds_addr = pcr->rtsx_resv_buf_addr; in rtsx_pci_probe()
1129 pcr->host_sg_tbl_ptr = pcr->rtsx_resv_buf + HOST_CMDS_BUF_LEN; in rtsx_pci_probe()
1130 pcr->host_sg_tbl_addr = pcr->rtsx_resv_buf_addr + HOST_CMDS_BUF_LEN; in rtsx_pci_probe()
1132 pcr->card_inserted = 0; in rtsx_pci_probe()
1133 pcr->card_removed = 0; in rtsx_pci_probe()
1134 INIT_DELAYED_WORK(&pcr->carddet_work, rtsx_pci_card_detect); in rtsx_pci_probe()
1135 INIT_DELAYED_WORK(&pcr->idle_work, rtsx_pci_idle_work); in rtsx_pci_probe()
1137 pcr->msi_en = msi_en; in rtsx_pci_probe()
1138 if (pcr->msi_en) { in rtsx_pci_probe()
1141 pcr->msi_en = false; in rtsx_pci_probe()
1144 ret = rtsx_pci_acquire_irq(pcr); in rtsx_pci_probe()
1149 synchronize_irq(pcr->irq); in rtsx_pci_probe()
1151 ret = rtsx_pci_init_chip(pcr); in rtsx_pci_probe()
1159 ret = mfd_add_devices(&pcidev->dev, pcr->id, rtsx_pcr_cells, in rtsx_pci_probe()
1164 schedule_delayed_work(&pcr->idle_work, msecs_to_jiffies(200)); in rtsx_pci_probe()
1169 free_irq(pcr->irq, (void *)pcr); in rtsx_pci_probe()
1171 if (pcr->msi_en) in rtsx_pci_probe()
1172 pci_disable_msi(pcr->pci); in rtsx_pci_probe()
1173 dma_free_coherent(&(pcr->pci->dev), RTSX_RESV_BUF_LEN, in rtsx_pci_probe()
1174 pcr->rtsx_resv_buf, pcr->rtsx_resv_buf_addr); in rtsx_pci_probe()
1176 iounmap(pcr->remap_addr); in rtsx_pci_probe()
1182 kfree(pcr); in rtsx_pci_probe()
1194 struct rtsx_pcr *pcr = handle->pcr; in rtsx_pci_remove() local
1196 pcr->remove_pci = true; in rtsx_pci_remove()
1198 cancel_delayed_work(&pcr->carddet_work); in rtsx_pci_remove()
1199 cancel_delayed_work(&pcr->idle_work); in rtsx_pci_remove()
1203 dma_free_coherent(&(pcr->pci->dev), RTSX_RESV_BUF_LEN, in rtsx_pci_remove()
1204 pcr->rtsx_resv_buf, pcr->rtsx_resv_buf_addr); in rtsx_pci_remove()
1205 free_irq(pcr->irq, (void *)pcr); in rtsx_pci_remove()
1206 if (pcr->msi_en) in rtsx_pci_remove()
1207 pci_disable_msi(pcr->pci); in rtsx_pci_remove()
1208 iounmap(pcr->remap_addr); in rtsx_pci_remove()
1215 idr_remove(&rtsx_pci_idr, pcr->id); in rtsx_pci_remove()
1218 kfree(pcr->slots); in rtsx_pci_remove()
1219 kfree(pcr); in rtsx_pci_remove()
1232 struct rtsx_pcr *pcr; in rtsx_pci_suspend() local
1238 pcr = handle->pcr; in rtsx_pci_suspend()
1240 cancel_delayed_work(&pcr->carddet_work); in rtsx_pci_suspend()
1241 cancel_delayed_work(&pcr->idle_work); in rtsx_pci_suspend()
1243 mutex_lock(&pcr->pcr_mutex); in rtsx_pci_suspend()
1245 if (pcr->ops->turn_off_led) in rtsx_pci_suspend()
1246 pcr->ops->turn_off_led(pcr); in rtsx_pci_suspend()
1248 rtsx_pci_writel(pcr, RTSX_BIER, 0); in rtsx_pci_suspend()
1249 pcr->bier = 0; in rtsx_pci_suspend()
1251 rtsx_pci_write_register(pcr, PETXCFG, 0x08, 0x08); in rtsx_pci_suspend()
1252 rtsx_pci_write_register(pcr, HOST_SLEEP_STATE, 0x03, 0x02); in rtsx_pci_suspend()
1259 mutex_unlock(&pcr->pcr_mutex); in rtsx_pci_suspend()
1266 struct rtsx_pcr *pcr; in rtsx_pci_resume() local
1272 pcr = handle->pcr; in rtsx_pci_resume()
1274 mutex_lock(&pcr->pcr_mutex); in rtsx_pci_resume()
1283 ret = rtsx_pci_write_register(pcr, HOST_SLEEP_STATE, 0x03, 0x00); in rtsx_pci_resume()
1287 ret = rtsx_pci_init_hw(pcr); in rtsx_pci_resume()
1291 schedule_delayed_work(&pcr->idle_work, msecs_to_jiffies(200)); in rtsx_pci_resume()
1294 mutex_unlock(&pcr->pcr_mutex); in rtsx_pci_resume()