Lines Matching refs:mmc
183 struct mmc_host *mmc; member
288 dev_dbg(mmc_dev(host->mmc), "CMD%d, arg 0x%08x%s\n", in mmc_davinci_start_command()
329 dev_dbg(mmc_dev(host->mmc), "unknown resp_type %04x\n", in mmc_davinci_start_command()
442 dev_dbg(mmc_dev(host->mmc), in mmc_davinci_send_dma_request()
464 dev_dbg(mmc_dev(host->mmc), in mmc_davinci_send_dma_request()
485 host->sg_len = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len, in mmc_davinci_start_dma_transfer()
493 dma_unmap_sg(mmc_dev(host->mmc), in mmc_davinci_start_dma_transfer()
528 &host->txdma, mmc_dev(host->mmc), "tx"); in davinci_acquire_dma_channels()
530 dev_err(mmc_dev(host->mmc), "Can't get dma_tx channel\n"); in davinci_acquire_dma_channels()
536 &host->rxdma, mmc_dev(host->mmc), "rx"); in davinci_acquire_dma_channels()
538 dev_err(mmc_dev(host->mmc), "Can't get dma_rx channel\n"); in davinci_acquire_dma_channels()
571 dev_dbg(mmc_dev(host->mmc), "%s %s, %d blocks of %d bytes\n", in mmc_davinci_prepare_data()
575 dev_dbg(mmc_dev(host->mmc), " DTO %d cycles + %d ns\n", in mmc_davinci_prepare_data()
628 static void mmc_davinci_request(struct mmc_host *mmc, struct mmc_request *req) in mmc_davinci_request() argument
630 struct mmc_davinci_host *host = mmc_priv(mmc); in mmc_davinci_request()
644 dev_err(mmc_dev(host->mmc), "still BUSY? bad ... \n"); in mmc_davinci_request()
646 mmc_request_done(mmc, req); in mmc_davinci_request()
683 static void calculate_clk_divider(struct mmc_host *mmc, struct mmc_ios *ios) in calculate_clk_divider() argument
687 struct mmc_davinci_host *host = mmc_priv(mmc); in calculate_clk_divider()
729 static void mmc_davinci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) in mmc_davinci_set_ios() argument
731 struct mmc_davinci_host *host = mmc_priv(mmc); in mmc_davinci_set_ios()
732 struct platform_device *pdev = to_platform_device(mmc->parent); in mmc_davinci_set_ios()
735 dev_dbg(mmc_dev(host->mmc), in mmc_davinci_set_ios()
753 dev_dbg(mmc_dev(host->mmc), "Enabling 8 bit mode\n"); in mmc_davinci_set_ios()
759 dev_dbg(mmc_dev(host->mmc), "Enabling 4 bit mode\n"); in mmc_davinci_set_ios()
770 dev_dbg(mmc_dev(host->mmc), "Enabling 1 bit mode\n"); in mmc_davinci_set_ios()
782 calculate_clk_divider(mmc, ios); in mmc_davinci_set_ios()
802 dev_warn(mmc_dev(host->mmc), "powerup timeout\n"); in mmc_davinci_set_ios()
813 if (host->mmc->caps & MMC_CAP_SDIO_IRQ) { in mmc_davinci_xfer_done()
822 mmc_signal_sdio_irq(host->mmc); in mmc_davinci_xfer_done()
829 dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len, in mmc_davinci_xfer_done()
838 mmc_request_done(host->mmc, data->mrq); in mmc_davinci_xfer_done()
866 mmc_request_done(host->mmc, cmd->mrq); in mmc_davinci_cmd_done()
901 dev_dbg(mmc_dev(host->mmc), in mmc_davinci_sdio_irq()
904 mmc_signal_sdio_irq(host->mmc); in mmc_davinci_sdio_irq()
919 dev_dbg(mmc_dev(host->mmc), in mmc_davinci_irq()
977 dev_err(mmc_dev(host->mmc), in mmc_davinci_irq()
987 dev_dbg(mmc_dev(host->mmc), in mmc_davinci_irq()
1011 dev_dbg(mmc_dev(host->mmc), "data %s %s error\n", in mmc_davinci_irq()
1021 dev_dbg(mmc_dev(host->mmc), in mmc_davinci_irq()
1035 dev_dbg(mmc_dev(host->mmc), "Command CRC error\n"); in mmc_davinci_irq()
1054 static int mmc_davinci_get_cd(struct mmc_host *mmc) in mmc_davinci_get_cd() argument
1056 struct platform_device *pdev = to_platform_device(mmc->parent); in mmc_davinci_get_cd()
1064 static int mmc_davinci_get_ro(struct mmc_host *mmc) in mmc_davinci_get_ro() argument
1066 struct platform_device *pdev = to_platform_device(mmc->parent); in mmc_davinci_get_ro()
1074 static void mmc_davinci_enable_sdio_irq(struct mmc_host *mmc, int enable) in mmc_davinci_enable_sdio_irq() argument
1076 struct mmc_davinci_host *host = mmc_priv(mmc); in mmc_davinci_enable_sdio_irq()
1081 mmc_signal_sdio_irq(host->mmc); in mmc_davinci_enable_sdio_irq()
1110 struct mmc_host *mmc; in mmc_davinci_cpufreq_transition() local
1114 mmc = host->mmc; in mmc_davinci_cpufreq_transition()
1118 spin_lock_irqsave(&mmc->lock, flags); in mmc_davinci_cpufreq_transition()
1120 calculate_clk_divider(mmc, &mmc->ios); in mmc_davinci_cpufreq_transition()
1121 spin_unlock_irqrestore(&mmc->lock, flags); in mmc_davinci_cpufreq_transition()
1233 struct mmc_host *mmc = NULL; in davinci_mmcsd_probe() local
1258 mmc = mmc_alloc_host(sizeof(struct mmc_davinci_host), &pdev->dev); in davinci_mmcsd_probe()
1259 if (!mmc) in davinci_mmcsd_probe()
1262 host = mmc_priv(mmc); in davinci_mmcsd_probe()
1263 host->mmc = mmc; /* Important */ in davinci_mmcsd_probe()
1307 mmc->caps |= MMC_CAP_NEEDS_POLL; in davinci_mmcsd_probe()
1308 mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY; in davinci_mmcsd_probe()
1311 mmc->caps |= MMC_CAP_4_BIT_DATA; in davinci_mmcsd_probe()
1314 mmc->caps |= (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA); in davinci_mmcsd_probe()
1320 mmc->ops = &mmc_davinci_ops; in davinci_mmcsd_probe()
1321 mmc->f_min = 312500; in davinci_mmcsd_probe()
1322 mmc->f_max = 25000000; in davinci_mmcsd_probe()
1324 mmc->f_max = pdata->max_freq; in davinci_mmcsd_probe()
1326 mmc->caps |= pdata->caps; in davinci_mmcsd_probe()
1327 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; in davinci_mmcsd_probe()
1333 mmc->max_segs = MAX_NR_SG; in davinci_mmcsd_probe()
1336 mmc->max_seg_size = MAX_CCNT * rw_threshold; in davinci_mmcsd_probe()
1339 mmc->max_blk_size = 4095; /* BLEN is 12 bits */ in davinci_mmcsd_probe()
1340 mmc->max_blk_count = 65535; /* NBLK is 16 bits */ in davinci_mmcsd_probe()
1341 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; in davinci_mmcsd_probe()
1343 dev_dbg(mmc_dev(host->mmc), "max_segs=%d\n", mmc->max_segs); in davinci_mmcsd_probe()
1344 dev_dbg(mmc_dev(host->mmc), "max_blk_size=%d\n", mmc->max_blk_size); in davinci_mmcsd_probe()
1345 dev_dbg(mmc_dev(host->mmc), "max_req_size=%d\n", mmc->max_req_size); in davinci_mmcsd_probe()
1346 dev_dbg(mmc_dev(host->mmc), "max_seg_size=%d\n", mmc->max_seg_size); in davinci_mmcsd_probe()
1356 ret = mmc_add_host(mmc); in davinci_mmcsd_probe()
1360 ret = request_irq(irq, mmc_davinci_irq, 0, mmc_hostname(mmc), host); in davinci_mmcsd_probe()
1366 mmc_hostname(mmc), host); in davinci_mmcsd_probe()
1368 mmc->caps |= MMC_CAP_SDIO_IRQ; in davinci_mmcsd_probe()
1371 rename_region(mem, mmc_hostname(mmc)); in davinci_mmcsd_probe()
1373 dev_info(mmc_dev(host->mmc), "Using %s, %d-bit mode\n", in davinci_mmcsd_probe()
1375 (mmc->caps & MMC_CAP_4_BIT_DATA) ? 4 : 1); in davinci_mmcsd_probe()
1394 if (mmc) in davinci_mmcsd_probe()
1395 mmc_free_host(mmc); in davinci_mmcsd_probe()
1413 mmc_remove_host(host->mmc); in davinci_mmcsd_remove()
1415 if (host->mmc->caps & MMC_CAP_SDIO_IRQ) in davinci_mmcsd_remove()
1427 mmc_free_host(host->mmc); in davinci_mmcsd_remove()
1440 ret = mmc_suspend_host(host->mmc); in davinci_mmcsd_suspend()
1465 ret = mmc_resume_host(host->mmc); in davinci_mmcsd_resume()