Lines Matching refs:reg_tmp
215 u32 reg_tmp; in wmt_set_sd_power() local
218 reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE); in wmt_set_sd_power()
219 writeb(reg_tmp | BM_SD_OFF, in wmt_set_sd_power()
222 reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE); in wmt_set_sd_power()
223 writeb(reg_tmp & (~BM_SD_OFF), in wmt_set_sd_power()
228 reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE); in wmt_set_sd_power()
229 writeb(reg_tmp & (~BM_SD_OFF), in wmt_set_sd_power()
232 reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE); in wmt_set_sd_power()
233 writeb(reg_tmp | BM_SD_OFF, in wmt_set_sd_power()
264 u32 reg_tmp; in wmt_mci_start_command() local
266 reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR); in wmt_mci_start_command()
267 writeb(reg_tmp | CTLR_CMD_START, priv->sdmmc_base + SDMMC_CTLR); in wmt_mci_start_command()
274 u32 reg_tmp; in wmt_mci_send_command() local
284 reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR); in wmt_mci_send_command()
285 writeb(reg_tmp | CTLR_FIFO_RESET, priv->sdmmc_base + SDMMC_CTLR); in wmt_mci_send_command()
297 reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR); in wmt_mci_send_command()
298 writeb((reg_tmp & 0x0F) | (cmdtype << 4), in wmt_mci_send_command()
392 u32 reg_tmp; in wmt_mci_regular_isr() local
402 reg_tmp = readb(priv->sdmmc_base + SDMMC_INTMASK0); in wmt_mci_regular_isr()
403 if ((reg_tmp & INT0_DI_INT_EN) && (status0 & STS0_DEVICE_INS)) { in wmt_mci_regular_isr()
481 u32 reg_tmp; in wmt_reset_hardware() local
486 reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE); in wmt_reset_hardware()
487 writeb(reg_tmp | BM_SOFT_RESET, priv->sdmmc_base + SDMMC_BUSMODE); in wmt_reset_hardware()
490 reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR); in wmt_reset_hardware()
491 writeb(reg_tmp | CTLR_FIFO_RESET, priv->sdmmc_base + SDMMC_CTLR); in wmt_reset_hardware()
510 reg_tmp = readb(priv->sdmmc_base + SDMMC_STS2); in wmt_reset_hardware()
511 writeb(reg_tmp | STS2_DIS_FORCECLK, priv->sdmmc_base + SDMMC_STS2); in wmt_reset_hardware()
544 u32 reg_tmp; in wmt_dma_config() local
557 reg_tmp = readl(priv->sdmmc_base + SDDMA_CCR); in wmt_dma_config()
558 writel(reg_tmp & DMA_CCR_IF_TO_PERIPHERAL, priv->sdmmc_base + in wmt_dma_config()
561 reg_tmp = readl(priv->sdmmc_base + SDDMA_CCR); in wmt_dma_config()
562 writel(reg_tmp | DMA_CCR_PERIPHERAL_TO_IF, priv->sdmmc_base + in wmt_dma_config()
569 u32 reg_tmp; in wmt_dma_start() local
571 reg_tmp = readl(priv->sdmmc_base + SDDMA_CCR); in wmt_dma_start()
572 writel(reg_tmp | DMA_CCR_RUN, priv->sdmmc_base + SDDMA_CCR); in wmt_dma_start()
583 u32 reg_tmp; in wmt_mci_request() local
626 reg_tmp = readw(priv->sdmmc_base + SDMMC_BLKLEN); in wmt_mci_request()
627 writew((reg_tmp & 0xF800) | (req->data->blksz - 1), in wmt_mci_request()
689 u32 reg_tmp; in wmt_mci_set_ios() local
706 reg_tmp = readb(priv->sdmmc_base + SDMMC_EXTCTRL); in wmt_mci_set_ios()
707 writeb(reg_tmp | 0x04, priv->sdmmc_base + SDMMC_EXTCTRL); in wmt_mci_set_ios()
710 reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE); in wmt_mci_set_ios()
711 writeb(reg_tmp | BM_FOURBIT_MODE, priv->sdmmc_base + in wmt_mci_set_ios()
714 reg_tmp = readb(priv->sdmmc_base + SDMMC_EXTCTRL); in wmt_mci_set_ios()
715 writeb(reg_tmp & 0xFB, priv->sdmmc_base + SDMMC_EXTCTRL); in wmt_mci_set_ios()
718 reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE); in wmt_mci_set_ios()
719 writeb(reg_tmp & BM_ONEBIT_MASK, priv->sdmmc_base + in wmt_mci_set_ios()
722 reg_tmp = readb(priv->sdmmc_base + SDMMC_EXTCTRL); in wmt_mci_set_ios()
723 writeb(reg_tmp & 0xFB, priv->sdmmc_base + SDMMC_EXTCTRL); in wmt_mci_set_ios()
898 u32 reg_tmp; in wmt_mci_remove() local
904 reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE); in wmt_mci_remove()
905 writel(reg_tmp | BM_SOFT_RESET, priv->sdmmc_base + SDMMC_BUSMODE); in wmt_mci_remove()
906 reg_tmp = readw(priv->sdmmc_base + SDMMC_BLKLEN); in wmt_mci_remove()
907 writew(reg_tmp & ~(0xA000), priv->sdmmc_base + SDMMC_BLKLEN); in wmt_mci_remove()
940 u32 reg_tmp; in wmt_mci_suspend() local
953 reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE); in wmt_mci_suspend()
954 writeb(reg_tmp | BM_SOFT_RESET, priv->sdmmc_base + in wmt_mci_suspend()
957 reg_tmp = readw(priv->sdmmc_base + SDMMC_BLKLEN); in wmt_mci_suspend()
958 writew(reg_tmp & 0x5FFF, priv->sdmmc_base + SDMMC_BLKLEN); in wmt_mci_suspend()
970 u32 reg_tmp; in wmt_mci_resume() local
980 reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE); in wmt_mci_resume()
981 writeb(reg_tmp | BM_SOFT_RESET, priv->sdmmc_base + in wmt_mci_resume()
984 reg_tmp = readw(priv->sdmmc_base + SDMMC_BLKLEN); in wmt_mci_resume()
985 writew(reg_tmp | (BLKL_GPI_CD | BLKL_INT_ENABLE), in wmt_mci_resume()
988 reg_tmp = readb(priv->sdmmc_base + SDMMC_INTMASK0); in wmt_mci_resume()
989 writeb(reg_tmp | INT0_DI_INT_EN, priv->sdmmc_base + in wmt_mci_resume()