256 	link_status = REG_RD(bp, params->shmem_base +  in bnx2x_check_lfa()
2145 	REG_WR(bp, params->shmem_base +  in bnx2x_update_mng()
2928 		eee_mode = ((REG_RD(bp, params->shmem_base +  in bnx2x_eee_calc_timer()
3105 	board_cfg = REG_RD(bp, params->shmem_base +  in bnx2x_bsc_module_sel()
3113 	sfp_ctrl = REG_RD(bp, params->shmem_base +  in bnx2x_bsc_module_sel()
3797 	if (REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_enable_AN_KR()
3969 		cfg_tap_val = REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_set_10G_XFI()
4274 						u32 shmem_base, u8 port,  in bnx2x_get_mod_abs_int_cfg()  argument
4281 		cfg_pin = (REG_RD(bp, shmem_base +  in bnx2x_get_mod_abs_int_cfg()
4318 				      params->shmem_base, params->port,  in bnx2x_is_sfp_module_plugged()
4364 		serdes_net_if = (REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_config_runtime()
4433 	cfg_pin = REG_RD(bp, params->shmem_base +  in bnx2x_sfp_e3_set_transmitter()
4454 	serdes_net_if = (REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_config_init()
4765 	vars->link_status = REG_RD(bp, params->shmem_base +  in bnx2x_link_status_update()
4782 	sync_offset = params->shmem_base +  in bnx2x_link_status_update()
4799 	sync_offset = params->shmem_base +  in bnx2x_link_status_update()
7342 	if (REG_RD(bp, params->shmem_base +  in bnx2x_8073_config_init()
7630 	bnx2x_save_spirom_version(bp, params->port, params->shmem_base, 0);  in bnx2x_8705_config_init()
7717 	tx_en_mode = REG_RD(bp, params->shmem_base +  in bnx2x_sfp_e1e2_set_transmitter()
7849 	pin_cfg = (REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_power_module()
8137 	sync_offset = params->shmem_base +  in bnx2x_get_edc_mode()
8185 	val = REG_RD(bp, params->shmem_base +  in bnx2x_verify_sfp_module()
8450 	u32 fault_led_gpio = REG_RD(bp, params->shmem_base +  in bnx2x_set_e1e2_module_fault_led()
8483 	pin_cfg = (REG_RD(bp, params->shmem_base +  in bnx2x_set_e3_module_fault_led()
8604 	u32 val = REG_RD(bp, params->shmem_base +  in bnx2x_sfp_module_detection()
8665 	if (bnx2x_get_mod_abs_int_cfg(bp, params->chip_id, params->shmem_base,  in bnx2x_handle_module_detect_int()
8898 	tx_en_mode = REG_RD(bp, params->shmem_base +  in bnx2x_8706_config_init()
9271 	tx_en_mode = REG_RD(bp, params->shmem_base +  in bnx2x_8727_config_init()
9301 	u32 val = REG_RD(bp, params->shmem_base +  in bnx2x_8727_handle_mod_abs()
9914 	pair_swap = REG_RD(bp, params->shmem_base +  in bnx2x_84833_pair_swap_cfg()
9990 	shmem_base_path[0] = params->shmem_base;  in bnx2x_84833_hw_reset_phy()
10155 		u32 cms_enable = REG_RD(bp, params->shmem_base +  in bnx2x_848x3_config_init()
10708 	cfg_pin = (REG_RD(bp, params->shmem_base +  in bnx2x_54618se_config_init()
10947 	cfg_pin = (REG_RD(bp, params->shmem_base +  in bnx2x_54618se_link_reset()
11766 static void bnx2x_populate_preemphasis(struct bnx2x *bp, u32 shmem_base,  in bnx2x_populate_preemphasis()  argument
11778 			rx = REG_RD(bp, shmem_base +  in bnx2x_populate_preemphasis()
11782 			tx = REG_RD(bp, shmem_base +  in bnx2x_populate_preemphasis()
11786 			rx = REG_RD(bp, shmem_base +  in bnx2x_populate_preemphasis()
11790 			tx = REG_RD(bp, shmem_base +  in bnx2x_populate_preemphasis()
11803 static u32 bnx2x_get_ext_phy_config(struct bnx2x *bp, u32 shmem_base,  in bnx2x_get_ext_phy_config()  argument
11809 		ext_phy_config = REG_RD(bp, shmem_base +  in bnx2x_get_ext_phy_config()
11814 		ext_phy_config = REG_RD(bp, shmem_base +  in bnx2x_get_ext_phy_config()
11825 static int bnx2x_populate_int_phy(struct bnx2x *bp, u32 shmem_base, u8 port,  in bnx2x_populate_int_phy()  argument
11830 	u32 switch_cfg = (REG_RD(bp, shmem_base +  in bnx2x_populate_int_phy()
11848 		serdes_net_if = (REG_RD(bp, shmem_base +  in bnx2x_populate_int_phy()
11958 	bnx2x_populate_preemphasis(bp, shmem_base, phy, port, INT_PHY);  in bnx2x_populate_int_phy()
11964 				  u32 shmem_base,  in bnx2x_populate_ext_phy()  argument
11971 	ext_phy_config = bnx2x_get_ext_phy_config(bp, shmem_base,  in bnx2x_populate_ext_phy()
12035 	bnx2x_populate_preemphasis(bp, shmem_base, phy, port, phy_index);  in bnx2x_populate_ext_phy()
12041 	config2 = REG_RD(bp, shmem_base + offsetof(struct shmem_region,  in bnx2x_populate_ext_phy()
12044 		phy->ver_addr = shmem_base + offsetof(struct shmem_region,  in bnx2x_populate_ext_phy()
12089 static int bnx2x_populate_phy(struct bnx2x *bp, u8 phy_index, u32 shmem_base,  in bnx2x_populate_phy()  argument
12095 		return bnx2x_populate_int_phy(bp, shmem_base, port, phy);  in bnx2x_populate_phy()
12096 	status = bnx2x_populate_ext_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_populate_phy()
12109 		link_config = REG_RD(bp, params->shmem_base +  in bnx2x_phy_def_cfg()
12112 		phy->speed_cap_mask = REG_RD(bp, params->shmem_base +  in bnx2x_phy_def_cfg()
12117 		link_config = REG_RD(bp, params->shmem_base +  in bnx2x_phy_def_cfg()
12120 		phy->speed_cap_mask = REG_RD(bp, params->shmem_base +  in bnx2x_phy_def_cfg()
12230 		if (bnx2x_populate_phy(bp, phy_index, params->shmem_base,  in bnx2x_phy_probe()
12253 		sync_offset = params->shmem_base +  in bnx2x_phy_probe()
12814 		u32 shmem_base, shmem2_base;  in bnx2x_8073_common_init_phy()  local
12817 			shmem_base = shmem_base_path[0];  in bnx2x_8073_common_init_phy()
12821 			shmem_base = shmem_base_path[port];  in bnx2x_8073_common_init_phy()
12827 		if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_8073_common_init_phy()
12941 		u32 shmem_base, shmem2_base;  in bnx2x_8726_common_init_phy()  local
12945 			shmem_base = shmem_base_path[0];  in bnx2x_8726_common_init_phy()
12948 			shmem_base = shmem_base_path[port];  in bnx2x_8726_common_init_phy()
12952 		if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_8726_common_init_phy()
12972 static void bnx2x_get_ext_phy_reset_gpio(struct bnx2x *bp, u32 shmem_base,  in bnx2x_get_ext_phy_reset_gpio()  argument
12976 	u32 phy_gpio_reset = REG_RD(bp, shmem_base +  in bnx2x_get_ext_phy_reset_gpio()
13054 		u32 shmem_base, shmem2_base;  in bnx2x_8727_common_init_phy()  local
13058 			shmem_base = shmem_base_path[0];  in bnx2x_8727_common_init_phy()
13062 			shmem_base = shmem_base_path[port];  in bnx2x_8727_common_init_phy()
13068 		if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_8727_common_init_phy()
13236 	cfg_pin = (REG_RD(bp, params->shmem_base +  in bnx2x_check_over_curr()
13403 	cfg_pin = (REG_RD(bp, params->shmem_base + offsetof(struct shmem_region,  in bnx2x_sfp_tx_fault_detection()
13579 		if ((REG_RD(bp, params->shmem_base +  in bnx2x_period_func()
13599 			     u32 shmem_base,  in bnx2x_fan_failure_det_req()  argument
13607 		if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_fan_failure_det_req()
13642 			    u32 chip_id, u32 shmem_base, u32 shmem2_base,  in bnx2x_init_mod_abs_int()  argument
13650 					      shmem_base,  in bnx2x_init_mod_abs_int()
13659 			if (bnx2x_populate_phy(bp, phy_index, shmem_base,  in bnx2x_init_mod_abs_int()
13686 	sync_offset = shmem_base +  in bnx2x_init_mod_abs_int()