Lines Matching refs:writeq
1153 writeq(val64, &bar0->tti_data1_mem); in init_tti()
1178 writeq(val64, &bar0->tti_data2_mem); in init_tti()
1183 writeq(val64, &bar0->tti_command_mem); in init_tti()
1228 writeq(val64, &bar0->sw_reset); in init_nic()
1235 writeq(val64, &bar0->sw_reset); in init_nic()
1257 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1259 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1269 writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len); in init_nic()
1290 writeq(val64, &bar0->tx_fifo_partition_0); in init_nic()
1291 writeq(val64, &bar0->tx_fifo_partition_1); in init_nic()
1292 writeq(val64, &bar0->tx_fifo_partition_2); in init_nic()
1293 writeq(val64, &bar0->tx_fifo_partition_3); in init_nic()
1308 writeq(val64, &bar0->tx_fifo_partition_0); in init_nic()
1313 writeq(val64, &bar0->tx_fifo_partition_1); in init_nic()
1318 writeq(val64, &bar0->tx_fifo_partition_2); in init_nic()
1323 writeq(val64, &bar0->tx_fifo_partition_3); in init_nic()
1338 writeq(PCC_ENABLE_FOUR, &bar0->pcc_enable); in init_nic()
1353 writeq(val64, &bar0->tx_pa_cfg); in init_nic()
1362 writeq(val64, &bar0->rx_queue_priority); in init_nic()
1411 writeq(val64, &bar0->rx_queue_cfg); in init_nic()
1420 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1421 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1422 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1423 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1424 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1428 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1429 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1430 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1431 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1433 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1437 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1439 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1441 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1443 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1445 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1449 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1450 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1451 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1452 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1454 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1458 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1460 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1462 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1464 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1466 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1470 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1472 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1474 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1476 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1478 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1482 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1484 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1486 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1488 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1490 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1494 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1495 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1496 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1497 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1499 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1506 writeq(val64, &bar0->tx_fifo_partition_0); in init_nic()
1515 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1516 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1517 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1518 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1519 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1522 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1526 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1527 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1528 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1529 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1531 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1534 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1538 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1540 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1542 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1544 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1546 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1549 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1553 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1554 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1555 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1556 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1558 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1561 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1565 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1567 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1569 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1571 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1573 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1576 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1580 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1582 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1584 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1586 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1588 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1591 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1595 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1597 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1599 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1601 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1603 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1606 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1610 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1611 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1612 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1613 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1615 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1618 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1625 writeq(val64, &bar0->rts_frm_len_n[i]); in init_nic()
1630 writeq(val64, &bar0->rts_frm_len_n[i]); in init_nic()
1643 writeq(MAC_RTS_FRM_LEN_SET(rts_frm_len[i]), in init_nic()
1659 writeq(mac_control->stats_mem_phy, &bar0->stat_addr); in init_nic()
1663 writeq(val64, &bar0->stat_byte_cnt); in init_nic()
1672 writeq(val64, &bar0->mac_link_util); in init_nic()
1698 writeq(val64, &bar0->rti_data1_mem); in init_nic()
1708 writeq(val64, &bar0->rti_data2_mem); in init_nic()
1714 writeq(val64, &bar0->rti_command_mem); in init_nic()
1743 writeq(0xffbbffbbffbbffbbULL, &bar0->mc_pause_thresh_q0q3); in init_nic()
1744 writeq(0xffbbffbbffbbffbbULL, &bar0->mc_pause_thresh_q4q7); in init_nic()
1750 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1752 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1761 writeq(val64, &bar0->mac_cfg); in init_nic()
1763 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1765 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1776 writeq(val64, &bar0->rmac_pause_cfg); in init_nic()
1790 writeq(val64, &bar0->mc_pause_thresh_q0q3); in init_nic()
1798 writeq(val64, &bar0->mc_pause_thresh_q4q7); in init_nic()
1806 writeq(val64, &bar0->pic_control); in init_nic()
1809 writeq(TXREQTO_VAL(0x7f) | TXREQTO_EN, &bar0->txreqtimeout); in init_nic()
1810 writeq(0x0, &bar0->read_retry_delay); in init_nic()
1811 writeq(0x0, &bar0->write_retry_delay); in init_nic()
1821 writeq(val64, &bar0->misc_control); in init_nic()
1824 writeq(val64, &bar0->pic_control2); in init_nic()
1828 writeq(val64, &bar0->tmac_avg_ipg); in init_nic()
1863 writeq(temp64, addr); in do_s2io_write_bits()
1872 writeq(DISABLE_ALL_INTRS, &bar0->general_int_mask); in en_dis_err_alarms()
2030 writeq(DISABLE_ALL_INTRS, &bar0->pic_int_mask); in en_dis_able_nic_intrs()
2036 writeq(DISABLE_ALL_INTRS, &bar0->pic_int_mask); in en_dis_able_nic_intrs()
2048 writeq(0x0, &bar0->tx_traffic_mask); in en_dis_able_nic_intrs()
2054 writeq(DISABLE_ALL_INTRS, &bar0->tx_traffic_mask); in en_dis_able_nic_intrs()
2063 writeq(0x0, &bar0->rx_traffic_mask); in en_dis_able_nic_intrs()
2069 writeq(DISABLE_ALL_INTRS, &bar0->rx_traffic_mask); in en_dis_able_nic_intrs()
2078 writeq(temp64, &bar0->general_int_mask); in en_dis_able_nic_intrs()
2201 writeq(fix_mac[i++], &bar0->gpio_control); in fix_mac_address()
2233 writeq((u64)ring->rx_blocks[0].block_dma_addr, in start_nic()
2245 writeq(val64, &bar0->prc_ctrl_n[i]); in start_nic()
2252 writeq(val64, &bar0->rx_pa_cfg); in start_nic()
2258 writeq(val64, &bar0->rx_pa_cfg); in start_nic()
2277 writeq(val64, &bar0->adapter_control); in start_nic()
2302 writeq(val64, &bar0->adapter_control); in start_nic()
2317 writeq(val64, &bar0->gpio_control); in start_nic()
2319 writeq(val64, (void __iomem *)bar0 + 0x2700); in start_nic()
2434 writeq(val64, &bar0->adapter_control); in stop_nic()
2831 writeq(0, &bar0->rx_traffic_mask); in s2io_poll_inta()
2862 writeq(val64, &bar0->rx_traffic_int); in s2io_netpoll()
2863 writeq(val64, &bar0->tx_traffic_int); in s2io_netpoll()
3112 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3114 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3123 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3125 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3132 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3134 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3158 writeq(val64, &bar0->mdio_control); in s2io_mdio_read()
3160 writeq(val64, &bar0->mdio_control); in s2io_mdio_read()
3168 writeq(val64, &bar0->mdio_control); in s2io_mdio_read()
3170 writeq(val64, &bar0->mdio_control); in s2io_mdio_read()
3430 writeq(val64, &bar0->sw_reset); in s2io_reset()
3470 writeq(s2BIT(62), &bar0->txpic_int_reg); in s2io_reset()
3507 writeq(val64, &bar0->gpio_control); in s2io_reset()
3509 writeq(val64, (void __iomem *)bar0 + 0x2700); in s2io_reset()
3518 writeq(val64, &bar0->pcc_err_reg); in s2io_reset()
3556 writeq(value[i], &bar0->swapper_ctrl); in s2io_set_swapper()
3574 writeq(valt, &bar0->xmsi_address); in s2io_set_swapper()
3587 writeq((value[i] | valr), &bar0->swapper_ctrl); in s2io_set_swapper()
3588 writeq(valt, &bar0->xmsi_address); in s2io_set_swapper()
3622 writeq(val64, &bar0->swapper_ctrl); in s2io_set_swapper()
3646 writeq(val64, &bar0->swapper_ctrl); in s2io_set_swapper()
3698 writeq(nic->msix_info[i].addr, &bar0->xmsi_address); in restore_xmsi_data()
3699 writeq(nic->msix_info[i].data, &bar0->xmsi_data); in restore_xmsi_data()
3701 writeq(val64, &bar0->xmsi_access); in restore_xmsi_data()
3723 writeq(val64, &bar0->xmsi_access); in store_xmsi_data()
3792 writeq(rx_mat, &bar0->rx_mat); in s2io_enable_msi_x()
3855 writeq(val64, &bar0->scheduled_int_ctrl); in s2io_test_msi()
3870 writeq(saved64, &bar0->scheduled_int_ctrl); in s2io_test_msi()
4207 writeq(val64, &tx_fifo->TxDL_Pointer); in s2io_xmit()
4214 writeq(val64, &tx_fifo->List_Control); in s2io_xmit()
4303 writeq(S2IO_MINUS_ONE, &bar0->general_int_mask); in s2io_msix_fifo_handle()
4309 writeq(S2IO_MINUS_ONE, &bar0->tx_traffic_int); in s2io_msix_fifo_handle()
4314 writeq(sp->general_int_mask, &bar0->general_int_mask); in s2io_msix_fifo_handle()
4338 writeq(val64, &bar0->gpio_int_reg); in s2io_txpic_intr_handle()
4342 writeq(val64, &bar0->gpio_int_mask); in s2io_txpic_intr_handle()
4348 writeq(val64, &bar0->adapter_control); in s2io_txpic_intr_handle()
4350 writeq(val64, &bar0->adapter_control); in s2io_txpic_intr_handle()
4362 writeq(val64, &bar0->gpio_int_mask); in s2io_txpic_intr_handle()
4371 writeq(val64, &bar0->gpio_int_mask); in s2io_txpic_intr_handle()
4376 writeq(val64, &bar0->adapter_control); in s2io_txpic_intr_handle()
4398 writeq(val64, addr); in do_s2io_chk_alarm_bit()
4447 writeq(val64, &bar0->mac_rmac_err_reg); in s2io_handle_errors()
4679 writeq(val64, &bar0->mc_err_reg); in s2io_handle_errors()
4750 writeq(S2IO_MINUS_ONE, &bar0->general_int_mask); in s2io_isr()
4755 writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_mask); in s2io_isr()
4756 writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_int); in s2io_isr()
4766 writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_int); in s2io_isr()
4781 writeq(S2IO_MINUS_ONE, &bar0->tx_traffic_int); in s2io_isr()
4799 writeq(sp->general_int_mask, &bar0->general_int_mask); in s2io_isr()
4825 writeq(val64, &bar0->stat_cfg); in s2io_updt_stats()
4953 writeq(RMAC_ADDR_DATA0_MEM_ADDR(multi_mac), in s2io_set_multicast()
4955 writeq(RMAC_ADDR_DATA1_MEM_MASK(mask), in s2io_set_multicast()
4960 writeq(val64, &bar0->rmac_addr_cmd_mem); in s2io_set_multicast()
4970 writeq(RMAC_ADDR_DATA0_MEM_ADDR(dis_addr), in s2io_set_multicast()
4972 writeq(RMAC_ADDR_DATA1_MEM_MASK(0x0), in s2io_set_multicast()
4977 writeq(val64, &bar0->rmac_addr_cmd_mem); in s2io_set_multicast()
4993 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in s2io_set_multicast()
4995 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in s2io_set_multicast()
5001 writeq(val64, &bar0->rx_pa_cfg); in s2io_set_multicast()
5015 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in s2io_set_multicast()
5017 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in s2io_set_multicast()
5023 writeq(val64, &bar0->rx_pa_cfg); in s2io_set_multicast()
5048 writeq(RMAC_ADDR_DATA0_MEM_ADDR(dis_addr), in s2io_set_multicast()
5050 writeq(RMAC_ADDR_DATA1_MEM_MASK(0ULL), in s2io_set_multicast()
5056 writeq(val64, &bar0->rmac_addr_cmd_mem); in s2io_set_multicast()
5078 writeq(RMAC_ADDR_DATA0_MEM_ADDR(mac_addr), in s2io_set_multicast()
5080 writeq(RMAC_ADDR_DATA1_MEM_MASK(0ULL), in s2io_set_multicast()
5086 writeq(val64, &bar0->rmac_addr_cmd_mem); in s2io_set_multicast()
5178 writeq(RMAC_ADDR_DATA0_MEM_ADDR(addr), in do_s2io_add_mac()
5183 writeq(val64, &bar0->rmac_addr_cmd_mem); in do_s2io_add_mac()
5227 writeq(val64, &bar0->rmac_addr_cmd_mem); in do_s2io_read_unicast_mc()
5448 writeq(val64, &bar0->gpio_control); in s2io_set_led()
5456 writeq(val64, &bar0->adapter_control); in s2io_set_led()
5503 writeq(sp->adapt_ctrl_org, &bar0->gpio_control); in s2io_ethtool_set_led()
5589 writeq(val64, &bar0->rmac_pause_cfg); in s2io_ethtool_setpause_data()
5705 writeq(SPI_DATA_WRITE(data, (cnt << 3)), &bar0->spi_data); in write_eeprom()
5934 writeq(val64, &bar0->xmsi_data); in s2io_register_test()
5942 writeq(val64, &bar0->xmsi_data); in s2io_register_test()
6139 writeq(val64, &bar0->adapter_control); in s2io_rldram_test()
6156 writeq(val64, &bar0->mc_rldram_test_d0); in s2io_rldram_test()
6161 writeq(val64, &bar0->mc_rldram_test_d1); in s2io_rldram_test()
6166 writeq(val64, &bar0->mc_rldram_test_d2); in s2io_rldram_test()
6169 writeq(val64, &bar0->mc_rldram_test_add); in s2io_rldram_test()
6713 writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len); in s2io_change_mtu()
6759 writeq(val64, &bar0->adapter_control); in s2io_set_link()
6764 writeq(val64, &bar0->gpio_control); in s2io_set_link()
6768 writeq(val64, &bar0->adapter_control); in s2io_set_link()
6780 writeq(val64, &bar0->adapter_control); in s2io_set_link()
6787 writeq(val64, &bar0->gpio_control); in s2io_set_link()
6793 writeq(val64, &bar0->adapter_control); in s2io_set_link()
7662 writeq(val64, &bar0->rts_ds_mem_data); in rts_ds_steer()
7668 writeq(val64, &bar0->rts_ds_mem_ctrl); in rts_ds_steer()
8000 writeq(val64, &bar0->rmac_addr_cmd_mem); in s2io_init_nic()
8064 writeq(val64, &bar0->gpio_control); in s2io_init_nic()
8066 writeq(val64, (void __iomem *)bar0 + 0x2700); in s2io_init_nic()