51 	writeq(VXGE_HW_INTR_MASK_ALL, &vp_reg->kdfcctl_errors_reg);  in vxge_hw_vpath_intr_enable()
107 	writeq((u32)vxge_bVALn((VXGE_HW_GENERAL_ERRORS_REG_DBLGEN_FIFO1_OVRFLOW|  in vxge_hw_vpath_intr_enable()
183 	writeq(VXGE_HW_INTR_MASK_ALL, &vp_reg->kdfcctl_errors_mask);  in vxge_hw_vpath_intr_disable()
239 		writeq(val64, &vp_reg->tim_cfg1_int_num[VXGE_HW_VPATH_INTR_TX]);  in vxge_hw_vpath_tti_ci_set()
249 	writeq(val64, &ring->vp_reg->tim_cfg1_int_num[VXGE_HW_VPATH_INTR_RX]);  in vxge_hw_vpath_dynamic_rti_ci_set()
262 	writeq(val64, &fifo->vp_reg->tim_cfg3_int_num[VXGE_HW_VPATH_INTR_TX]);  in vxge_hw_vpath_dynamic_tti_rtimer_set()
278 	writeq(val64, &ring->vp_reg->tim_cfg3_int_num[VXGE_HW_VPATH_INTR_RX]);  in vxge_hw_vpath_dynamic_rti_rtimer_set()
388 			writeq(val64, &hldev->common_reg->tim_int_status0);  in vxge_hw_device_intr_enable()
390 			writeq(~val64, &hldev->common_reg->tim_int_mask0);  in vxge_hw_device_intr_enable()
427 	writeq(VXGE_HW_INTR_MASK_ALL, &hldev->common_reg->tim_int_mask0);  in vxge_hw_device_intr_disable()
664 				writeq(  in __vxge_hw_vpath_alarm_process()
685 				writeq(  in __vxge_hw_vpath_alarm_process()
694 			writeq(VXGE_HW_INTR_MASK_ALL,  in __vxge_hw_vpath_alarm_process()
749 				writeq(VXGE_HW_INTR_MASK_ALL,  in __vxge_hw_vpath_alarm_process()
794 				writeq(VXGE_HW_INTR_MASK_ALL,  in __vxge_hw_vpath_alarm_process()
845 				writeq(VXGE_HW_INTR_MASK_ALL,  in __vxge_hw_vpath_alarm_process()
981 		writeq((hldev->tim_int_mask0[VXGE_HW_VPATH_INTR_TX] |  in vxge_hw_device_clear_tx_rx()
1411 	writeq(VXGE_HW_NODBW_TYPE(VXGE_HW_NODBW_TYPE_NODBW) |  in __vxge_hw_non_offload_db_post()
1418 	writeq(txdl_ptr, &fifo->nofl_db->txdl_ptr);  in __vxge_hw_non_offload_db_post()
2077 		writeq(val64, &vpath->vp_reg->rxmac_vcfg0);  in vxge_hw_vpath_promisc_enable()
2113 		writeq(val64, &vpath->vp_reg->rxmac_vcfg0);  in vxge_hw_vpath_promisc_disable()
2143 		writeq(val64, &vpath->vp_reg->rxmac_vcfg0);  in vxge_hw_vpath_bcast_enable()
2175 		writeq(val64, &vpath->vp_reg->rxmac_vcfg0);  in vxge_hw_vpath_mcast_enable()
2208 		writeq(val64, &vpath->vp_reg->rxmac_vcfg0);  in vxge_hw_vpath_mcast_disable()
2264 	writeq(val64, &vp_reg->interrupt_cfg0);  in vxge_hw_vpath_msix_set()
2266 	writeq(VXGE_HW_INTERRUPT_CFG2_ALARM_MAP_TO_MSG(  in vxge_hw_vpath_msix_set()
2374 		writeq((tim_int_mask0[VXGE_HW_VPATH_INTR_TX] |  in vxge_hw_vpath_inta_mask_tx_rx()
2412 		writeq((~(tim_int_mask0[VXGE_HW_VPATH_INTR_TX] |  in vxge_hw_vpath_inta_unmask_tx_rx()
2471 			writeq(VXGE_HW_PRC_RXD_DOORBELL_NEW_QW_CNT(new_count),  in vxge_hw_vpath_poll_rx()