1250 				   struct qlcnic_ms_reg_ctrl *ms)  in qlcnic_set_ms_controls()  argument
1252 	ms->control = QLCNIC_MS_CTRL;  in qlcnic_set_ms_controls()
1253 	ms->low = QLCNIC_MS_ADDR_LO;  in qlcnic_set_ms_controls()
1254 	ms->hi = QLCNIC_MS_ADDR_HI;  in qlcnic_set_ms_controls()
1256 		ms->wd[0] = QLCNIC_MS_WRTDATA_LO;  in qlcnic_set_ms_controls()
1257 		ms->rd[0] = QLCNIC_MS_RDDATA_LO;  in qlcnic_set_ms_controls()
1258 		ms->wd[1] = QLCNIC_MS_WRTDATA_HI;  in qlcnic_set_ms_controls()
1259 		ms->rd[1] = QLCNIC_MS_RDDATA_HI;  in qlcnic_set_ms_controls()
1260 		ms->wd[2] = QLCNIC_MS_WRTDATA_ULO;  in qlcnic_set_ms_controls()
1261 		ms->wd[3] = QLCNIC_MS_WRTDATA_UHI;  in qlcnic_set_ms_controls()
1262 		ms->rd[2] = QLCNIC_MS_RDDATA_ULO;  in qlcnic_set_ms_controls()
1263 		ms->rd[3] = QLCNIC_MS_RDDATA_UHI;  in qlcnic_set_ms_controls()
1265 		ms->wd[0] = QLCNIC_MS_WRTDATA_ULO;  in qlcnic_set_ms_controls()
1266 		ms->rd[0] = QLCNIC_MS_RDDATA_ULO;  in qlcnic_set_ms_controls()
1267 		ms->wd[1] = QLCNIC_MS_WRTDATA_UHI;  in qlcnic_set_ms_controls()
1268 		ms->rd[1] = QLCNIC_MS_RDDATA_UHI;  in qlcnic_set_ms_controls()
1269 		ms->wd[2] = QLCNIC_MS_WRTDATA_LO;  in qlcnic_set_ms_controls()
1270 		ms->wd[3] = QLCNIC_MS_WRTDATA_HI;  in qlcnic_set_ms_controls()
1271 		ms->rd[2] = QLCNIC_MS_RDDATA_LO;  in qlcnic_set_ms_controls()
1272 		ms->rd[3] = QLCNIC_MS_RDDATA_HI;  in qlcnic_set_ms_controls()
1275 	ms->ocm_window = OCM_WIN_P3P(off);  in qlcnic_set_ms_controls()
1276 	ms->off = GET_MEM_OFFS_2M(off);  in qlcnic_set_ms_controls()
1283 	struct qlcnic_ms_reg_ctrl ms;  in qlcnic_pci_mem_write_2M()  local
1289 	memset(&ms, 0, sizeof(struct qlcnic_ms_reg_ctrl));  in qlcnic_pci_mem_write_2M()
1296 	qlcnic_set_ms_controls(adapter, off, &ms);  in qlcnic_pci_mem_write_2M()
1299 		return qlcnic_pci_mem_access_direct(adapter, ms.ocm_window,  in qlcnic_pci_mem_write_2M()
1300 						    ms.off, &data, 1);  in qlcnic_pci_mem_write_2M()
1306 	qlcnic_ind_wr(adapter, ms.low, off8);  in qlcnic_pci_mem_write_2M()
1307 	qlcnic_ind_wr(adapter, ms.hi, 0);  in qlcnic_pci_mem_write_2M()
1309 	qlcnic_ind_wr(adapter, ms.control, TA_CTL_ENABLE);  in qlcnic_pci_mem_write_2M()
1310 	qlcnic_ind_wr(adapter, ms.control, QLCNIC_TA_START_ENABLE);  in qlcnic_pci_mem_write_2M()
1313 		temp = qlcnic_ind_rd(adapter, ms.control);  in qlcnic_pci_mem_write_2M()
1324 	qlcnic_ind_wr(adapter, ms.wd[0], qlcnic_ind_rd(adapter, ms.rd[0]));  in qlcnic_pci_mem_write_2M()
1325 	qlcnic_ind_wr(adapter, ms.wd[1], qlcnic_ind_rd(adapter, ms.rd[1]));  in qlcnic_pci_mem_write_2M()
1327 	qlcnic_ind_wr(adapter, ms.wd[2], data & 0xffffffff);  in qlcnic_pci_mem_write_2M()
1328 	qlcnic_ind_wr(adapter, ms.wd[3], (data >> 32) & 0xffffffff);  in qlcnic_pci_mem_write_2M()
1330 	qlcnic_ind_wr(adapter, ms.control, QLCNIC_TA_WRITE_ENABLE);  in qlcnic_pci_mem_write_2M()
1331 	qlcnic_ind_wr(adapter, ms.control, QLCNIC_TA_WRITE_START);  in qlcnic_pci_mem_write_2M()
1334 		temp = qlcnic_ind_rd(adapter, ms.control);  in qlcnic_pci_mem_write_2M()
1358 	struct qlcnic_ms_reg_ctrl ms;  in qlcnic_pci_mem_read_2M()  local
1369 	memset(&ms, 0, sizeof(struct qlcnic_ms_reg_ctrl));  in qlcnic_pci_mem_read_2M()
1370 	qlcnic_set_ms_controls(adapter, off, &ms);  in qlcnic_pci_mem_read_2M()
1373 		return qlcnic_pci_mem_access_direct(adapter, ms.ocm_window,  in qlcnic_pci_mem_read_2M()
1374 						    ms.off, data, 0);  in qlcnic_pci_mem_read_2M()
1380 	qlcnic_ind_wr(adapter, ms.low, off8);  in qlcnic_pci_mem_read_2M()
1381 	qlcnic_ind_wr(adapter, ms.hi, 0);  in qlcnic_pci_mem_read_2M()
1383 	qlcnic_ind_wr(adapter, ms.control, TA_CTL_ENABLE);  in qlcnic_pci_mem_read_2M()
1384 	qlcnic_ind_wr(adapter, ms.control, QLCNIC_TA_START_ENABLE);  in qlcnic_pci_mem_read_2M()
1387 		temp = qlcnic_ind_rd(adapter, ms.control);  in qlcnic_pci_mem_read_2M()
1399 		temp = qlcnic_ind_rd(adapter, ms.rd[3]);  in qlcnic_pci_mem_read_2M()
1401 		val |= qlcnic_ind_rd(adapter, ms.rd[2]);  in qlcnic_pci_mem_read_2M()