106 #define RBR(iobase) (iobase+0)  argument
107 #define THR(iobase) (iobase+0)  argument
108 #define IER(iobase) (iobase+1)  argument
109 #define IIR(iobase) (iobase+2)  argument
110 #define FCR(iobase) (iobase+2)  argument
111 #define LCR(iobase) (iobase+3)  argument
112 #define MCR(iobase) (iobase+4)  argument
113 #define LSR(iobase) (iobase+5)  argument
114 #define MSR(iobase) (iobase+6)  argument
115 #define SCR(iobase) (iobase+7)  argument
116 #define DLL(iobase) (iobase+0)  argument
117 #define DLM(iobase) (iobase+1)  argument
380 static enum uart ser12_check_uart(unsigned int iobase)  in ser12_check_uart()  argument
387 	b1 = inb(MCR(iobase));  in ser12_check_uart()
388 	outb(b1 | 0x10, MCR(iobase));	/* loopback mode */  in ser12_check_uart()
389 	b2 = inb(MSR(iobase));  in ser12_check_uart()
390 	outb(0x1a, MCR(iobase));  in ser12_check_uart()
391 	b3 = inb(MSR(iobase)) & 0xf0;  in ser12_check_uart()
392 	outb(b1, MCR(iobase));			/* restore old values */  in ser12_check_uart()
393 	outb(b2, MSR(iobase));  in ser12_check_uart()
396 	inb(RBR(iobase));  in ser12_check_uart()
397 	inb(RBR(iobase));  in ser12_check_uart()
398 	outb(0x01, FCR(iobase));		/* enable FIFOs */  in ser12_check_uart()
399 	u = uart_tab[(inb(IIR(iobase)) >> 6) & 3];  in ser12_check_uart()
401 		outb(0x5a, SCR(iobase));  in ser12_check_uart()
402 		b1 = inb(SCR(iobase));  in ser12_check_uart()
403 		outb(0xa5, SCR(iobase));  in ser12_check_uart()
404 		b2 = inb(SCR(iobase));  in ser12_check_uart()
609 static int iobase[NR_PORTS] = { 0x3f8, };  variable
615 module_param_array(iobase, int, NULL, 0);
616 MODULE_PARM_DESC(iobase, "baycom io base address");
647 			iobase[i] = irq[i] = 0;  in init_baycomserfdx()
651 				       ifname, iobase[i], irq[i], 0);  in init_baycomserfdx()
705         iobase[nr_dev] = ints[1];  in baycom_ser_fdx_setup()