Lines Matching refs:iobase
176 static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase);
181 static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size);
182 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase);
185 static int nsc_ircc_read_dongle_id (int iobase);
186 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id);
517 int iobase; in nsc_ircc_close() local
523 iobase = self->io.fir_base; in nsc_ircc_close()
985 int iobase = info->fir_base; in nsc_ircc_setup() local
988 switch_bank(iobase, BANK3); in nsc_ircc_setup()
989 version = inb(iobase+MID); in nsc_ircc_setup()
1002 switch_bank(iobase, BANK2); in nsc_ircc_setup()
1003 outb(ECR1_EXT_SL, iobase+ECR1); in nsc_ircc_setup()
1004 switch_bank(iobase, BANK0); in nsc_ircc_setup()
1007 switch_bank(iobase, BANK0); in nsc_ircc_setup()
1008 outb(FCR_RXTH|FCR_TXTH|FCR_TXSR|FCR_RXSR|FCR_FIFO_EN, iobase+FCR); in nsc_ircc_setup()
1010 outb(0x03, iobase+LCR); /* 8 bit word length */ in nsc_ircc_setup()
1011 outb(MCR_SIR, iobase+MCR); /* Start at SIR-mode, also clears LSR*/ in nsc_ircc_setup()
1014 switch_bank(iobase, BANK2); in nsc_ircc_setup()
1015 outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2); in nsc_ircc_setup()
1018 switch_bank(iobase, BANK5); in nsc_ircc_setup()
1019 outb(0x02, iobase+4); in nsc_ircc_setup()
1022 switch_bank(iobase, BANK6); in nsc_ircc_setup()
1023 outb(0x20, iobase+0); /* Set 32 bits FIR CRC */ in nsc_ircc_setup()
1024 outb(0x0a, iobase+1); /* Set MIR pulse width */ in nsc_ircc_setup()
1025 outb(0x0d, iobase+2); /* Set SIR pulse width to 1.6us */ in nsc_ircc_setup()
1026 outb(0x2a, iobase+4); /* Set beginning frag, and preamble length */ in nsc_ircc_setup()
1029 switch_bank(iobase, BANK0); in nsc_ircc_setup()
1030 outb(IER_RXHDL_IE, iobase+IER); in nsc_ircc_setup()
1042 static int nsc_ircc_read_dongle_id (int iobase) in nsc_ircc_read_dongle_id() argument
1047 bank = inb(iobase+BSR); in nsc_ircc_read_dongle_id()
1050 switch_bank(iobase, BANK7); in nsc_ircc_read_dongle_id()
1053 outb(0x00, iobase+7); in nsc_ircc_read_dongle_id()
1059 dongle_id = inb(iobase+4) & 0x0f; in nsc_ircc_read_dongle_id()
1066 switch_bank(iobase, BANK0); in nsc_ircc_read_dongle_id()
1068 outb(bank, iobase+BSR); in nsc_ircc_read_dongle_id()
1081 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id) in nsc_ircc_init_dongle_interface() argument
1086 bank = inb(iobase+BSR); in nsc_ircc_init_dongle_interface()
1089 switch_bank(iobase, BANK7); in nsc_ircc_init_dongle_interface()
1122 outb(0x28, iobase+7); /* Set irsl[0-2] as output */ in nsc_ircc_init_dongle_interface()
1135 outb(0x48, iobase+7); in nsc_ircc_init_dongle_interface()
1138 outb(0x28, iobase+7); /* Set irsl[0-2] as output */ in nsc_ircc_init_dongle_interface()
1144 switch_bank(iobase, BANK0); in nsc_ircc_init_dongle_interface()
1145 outb(0x62, iobase+MCR); in nsc_ircc_init_dongle_interface()
1153 outb(0x00, iobase+4); in nsc_ircc_init_dongle_interface()
1156 outb(bank, iobase+BSR); in nsc_ircc_init_dongle_interface()
1166 static void nsc_ircc_change_dongle_speed(int iobase, int speed, int dongle_id) in nsc_ircc_change_dongle_speed() argument
1171 bank = inb(iobase+BSR); in nsc_ircc_change_dongle_speed()
1174 switch_bank(iobase, BANK7); in nsc_ircc_change_dongle_speed()
1205 outb(0x00, iobase+4); in nsc_ircc_change_dongle_speed()
1207 outb(0x01, iobase+4); in nsc_ircc_change_dongle_speed()
1210 outb(0x01, iobase+4); in nsc_ircc_change_dongle_speed()
1215 outb(0x81, iobase+4); in nsc_ircc_change_dongle_speed()
1216 outb(0x80, iobase+4); in nsc_ircc_change_dongle_speed()
1218 outb(0x00, iobase+4); in nsc_ircc_change_dongle_speed()
1234 switch_bank(iobase, BANK0); in nsc_ircc_change_dongle_speed()
1235 outb(0x62, iobase+MCR); in nsc_ircc_change_dongle_speed()
1241 outb(bank, iobase+BSR); in nsc_ircc_change_dongle_speed()
1255 int iobase; in nsc_ircc_change_speed() local
1263 iobase = self->io.fir_base; in nsc_ircc_change_speed()
1269 bank = inb(iobase+BSR); in nsc_ircc_change_speed()
1272 switch_bank(iobase, BANK0); in nsc_ircc_change_speed()
1273 outb(0, iobase+IER); in nsc_ircc_change_speed()
1276 switch_bank(iobase, BANK2); in nsc_ircc_change_speed()
1278 outb(0x00, iobase+BGDH); in nsc_ircc_change_speed()
1280 case 9600: outb(0x0c, iobase+BGDL); break; in nsc_ircc_change_speed()
1281 case 19200: outb(0x06, iobase+BGDL); break; in nsc_ircc_change_speed()
1282 case 38400: outb(0x03, iobase+BGDL); break; in nsc_ircc_change_speed()
1283 case 57600: outb(0x02, iobase+BGDL); break; in nsc_ircc_change_speed()
1284 case 115200: outb(0x01, iobase+BGDL); break; in nsc_ircc_change_speed()
1286 switch_bank(iobase, BANK5); in nsc_ircc_change_speed()
1289 outb(inb(iobase+4) | 0x04, iobase+4); in nsc_ircc_change_speed()
1310 switch_bank(iobase, BANK0); in nsc_ircc_change_speed()
1311 outb(mcr | MCR_TX_DFR, iobase+MCR); in nsc_ircc_change_speed()
1314 nsc_ircc_change_dongle_speed(iobase, speed, self->io.dongle_id); in nsc_ircc_change_speed()
1317 switch_bank(iobase, BANK0); in nsc_ircc_change_speed()
1318 outb(0x00, iobase+FCR); in nsc_ircc_change_speed()
1319 outb(FCR_FIFO_EN, iobase+FCR); in nsc_ircc_change_speed()
1325 iobase+FCR); in nsc_ircc_change_speed()
1328 switch_bank(iobase, BANK2); in nsc_ircc_change_speed()
1329 outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2); in nsc_ircc_change_speed()
1332 switch_bank(iobase, BANK0); in nsc_ircc_change_speed()
1344 outb(ier, iobase+IER); in nsc_ircc_change_speed()
1347 outb(bank, iobase+BSR); in nsc_ircc_change_speed()
1364 int iobase; in nsc_ircc_hard_xmit_sir() local
1372 iobase = self->io.fir_base; in nsc_ircc_hard_xmit_sir()
1408 bank = inb(iobase+BSR); in nsc_ircc_hard_xmit_sir()
1418 switch_bank(iobase, BANK0); in nsc_ircc_hard_xmit_sir()
1419 outb(IER_TXLDL_IE, iobase+IER); in nsc_ircc_hard_xmit_sir()
1422 outb(bank, iobase+BSR); in nsc_ircc_hard_xmit_sir()
1437 int iobase; in nsc_ircc_hard_xmit_fir() local
1443 iobase = self->io.fir_base; in nsc_ircc_hard_xmit_fir()
1481 bank = inb(iobase+BSR); in nsc_ircc_hard_xmit_fir()
1522 switch_bank(iobase, BANK4); in nsc_ircc_hard_xmit_fir()
1523 outb(mtt & 0xff, iobase+TMRL); in nsc_ircc_hard_xmit_fir()
1524 outb((mtt >> 8) & 0x0f, iobase+TMRH); in nsc_ircc_hard_xmit_fir()
1527 outb(IRCR1_TMR_EN, iobase+IRCR1); in nsc_ircc_hard_xmit_fir()
1531 switch_bank(iobase, BANK0); in nsc_ircc_hard_xmit_fir()
1532 outb(IER_TMR_IE, iobase+IER); in nsc_ircc_hard_xmit_fir()
1541 switch_bank(iobase, BANK0); in nsc_ircc_hard_xmit_fir()
1542 outb(IER_DMA_IE, iobase+IER); in nsc_ircc_hard_xmit_fir()
1545 nsc_ircc_dma_xmit(self, iobase); in nsc_ircc_hard_xmit_fir()
1554 outb(bank, iobase+BSR); in nsc_ircc_hard_xmit_fir()
1569 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase) in nsc_ircc_dma_xmit() argument
1574 bsr = inb(iobase+BSR); in nsc_ircc_dma_xmit()
1577 switch_bank(iobase, BANK0); in nsc_ircc_dma_xmit()
1578 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR); in nsc_ircc_dma_xmit()
1583 switch_bank(iobase, BANK2); in nsc_ircc_dma_xmit()
1584 outb(ECR1_DMASWP|ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1); in nsc_ircc_dma_xmit()
1593 switch_bank(iobase, BANK0); in nsc_ircc_dma_xmit()
1594 outb(inb(iobase+MCR)|MCR_TX_DFR|MCR_DMA_EN|MCR_IR_PLS, iobase+MCR); in nsc_ircc_dma_xmit()
1597 outb(bsr, iobase+BSR); in nsc_ircc_dma_xmit()
1607 static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size) in nsc_ircc_pio_write() argument
1615 bank = inb(iobase+BSR); in nsc_ircc_pio_write()
1617 switch_bank(iobase, BANK0); in nsc_ircc_pio_write()
1618 if (!(inb_p(iobase+LSR) & LSR_TXEMP)) { in nsc_ircc_pio_write()
1629 outb(buf[actual++], iobase+TXD); in nsc_ircc_pio_write()
1636 outb(bank, iobase+BSR); in nsc_ircc_pio_write()
1650 int iobase; in nsc_ircc_dma_xmit_complete() local
1656 iobase = self->io.fir_base; in nsc_ircc_dma_xmit_complete()
1659 bank = inb(iobase+BSR); in nsc_ircc_dma_xmit_complete()
1662 switch_bank(iobase, BANK0); in nsc_ircc_dma_xmit_complete()
1663 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR); in nsc_ircc_dma_xmit_complete()
1666 if (inb(iobase+ASCR) & ASCR_TXUR) { in nsc_ircc_dma_xmit_complete()
1671 outb(ASCR_TXUR, iobase+ASCR); in nsc_ircc_dma_xmit_complete()
1682 nsc_ircc_dma_xmit(self, iobase); in nsc_ircc_dma_xmit_complete()
1701 outb(bank, iobase+BSR); in nsc_ircc_dma_xmit_complete()
1715 int iobase; in nsc_ircc_dma_receive() local
1718 iobase = self->io.fir_base; in nsc_ircc_dma_receive()
1725 bsr = inb(iobase+BSR); in nsc_ircc_dma_receive()
1728 switch_bank(iobase, BANK0); in nsc_ircc_dma_receive()
1729 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR); in nsc_ircc_dma_receive()
1732 switch_bank(iobase, BANK2); in nsc_ircc_dma_receive()
1733 outb(ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1); in nsc_ircc_dma_receive()
1739 switch_bank(iobase, BANK0); in nsc_ircc_dma_receive()
1740 outb(FCR_RXSR|FCR_FIFO_EN, iobase+FCR); in nsc_ircc_dma_receive()
1749 switch_bank(iobase, BANK0); in nsc_ircc_dma_receive()
1750 outb(inb(iobase+MCR)|MCR_DMA_EN, iobase+MCR); in nsc_ircc_dma_receive()
1753 outb(bsr, iobase+BSR); in nsc_ircc_dma_receive()
1765 static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase) in nsc_ircc_dma_receive_complete() argument
1776 bank = inb(iobase+BSR); in nsc_ircc_dma_receive_complete()
1779 switch_bank(iobase, BANK5); in nsc_ircc_dma_receive_complete()
1780 while ((status = inb(iobase+FRM_ST)) & FRM_ST_VLD) { in nsc_ircc_dma_receive_complete()
1782 len = inb(iobase+RFLFL) | ((inb(iobase+RFLFH) & 0x1f) << 8); in nsc_ircc_dma_receive_complete()
1839 switch_bank(iobase, BANK0); in nsc_ircc_dma_receive_complete()
1840 if (inb(iobase+LSR) & LSR_RXDA) { in nsc_ircc_dma_receive_complete()
1852 switch_bank(iobase, BANK4); in nsc_ircc_dma_receive_complete()
1853 outb(0x02, iobase+TMRL); /* x 125 us */ in nsc_ircc_dma_receive_complete()
1854 outb(0x00, iobase+TMRH); in nsc_ircc_dma_receive_complete()
1857 outb(IRCR1_TMR_EN, iobase+IRCR1); in nsc_ircc_dma_receive_complete()
1860 outb(bank, iobase+BSR); in nsc_ircc_dma_receive_complete()
1881 outb(bank, iobase+BSR); in nsc_ircc_dma_receive_complete()
1914 outb(bank, iobase+BSR); in nsc_ircc_dma_receive_complete()
1928 int iobase; in nsc_ircc_pio_receive() local
1930 iobase = self->io.fir_base; in nsc_ircc_pio_receive()
1934 byte = inb(iobase+RXD); in nsc_ircc_pio_receive()
1937 } while (inb(iobase+LSR) & LSR_RXDA); /* Data available */ in nsc_ircc_pio_receive()
2011 static void nsc_ircc_fir_interrupt(struct nsc_ircc_cb *self, int iobase, in nsc_ircc_fir_interrupt() argument
2016 bank = inb(iobase+BSR); in nsc_ircc_fir_interrupt()
2021 if (nsc_ircc_dma_receive_complete(self, iobase)) { in nsc_ircc_fir_interrupt()
2029 switch_bank(iobase, BANK4); in nsc_ircc_fir_interrupt()
2030 outb(0, iobase+IRCR1); in nsc_ircc_fir_interrupt()
2033 switch_bank(iobase, BANK0); in nsc_ircc_fir_interrupt()
2034 outb(ASCR_CTE, iobase+ASCR); in nsc_ircc_fir_interrupt()
2038 nsc_ircc_dma_xmit(self, iobase); in nsc_ircc_fir_interrupt()
2044 if (nsc_ircc_dma_receive_complete(self, iobase)) { in nsc_ircc_fir_interrupt()
2083 outb(bank, iobase+BSR); in nsc_ircc_fir_interrupt()
2097 int iobase; in nsc_ircc_interrupt() local
2103 iobase = self->io.fir_base; in nsc_ircc_interrupt()
2105 bsr = inb(iobase+BSR); /* Save current bank */ in nsc_ircc_interrupt()
2107 switch_bank(iobase, BANK0); in nsc_ircc_interrupt()
2108 self->ier = inb(iobase+IER); in nsc_ircc_interrupt()
2109 eir = inb(iobase+EIR) & self->ier; /* Mask out the interesting ones */ in nsc_ircc_interrupt()
2111 outb(0, iobase+IER); /* Disable interrupts */ in nsc_ircc_interrupt()
2116 nsc_ircc_fir_interrupt(self, iobase, eir); in nsc_ircc_interrupt()
2121 outb(self->ier, iobase+IER); /* Restore interrupts */ in nsc_ircc_interrupt()
2122 outb(bsr, iobase+BSR); /* Restore bank register */ in nsc_ircc_interrupt()
2138 int iobase; in nsc_ircc_is_receiving() local
2146 iobase = self->io.fir_base; in nsc_ircc_is_receiving()
2149 bank = inb(iobase+BSR); in nsc_ircc_is_receiving()
2150 switch_bank(iobase, BANK2); in nsc_ircc_is_receiving()
2151 if ((inb(iobase+RXFLV) & 0x3f) != 0) { in nsc_ircc_is_receiving()
2155 outb(bank, iobase+BSR); in nsc_ircc_is_receiving()
2173 int iobase; in nsc_ircc_net_open() local
2184 iobase = self->io.fir_base; in nsc_ircc_net_open()
2203 bank = inb(iobase+BSR); in nsc_ircc_net_open()
2206 switch_bank(iobase, BANK0); in nsc_ircc_net_open()
2207 outb(IER_LS_IE | IER_RXHDL_IE, iobase+IER); in nsc_ircc_net_open()
2210 outb(bank, iobase+BSR); in nsc_ircc_net_open()
2236 int iobase; in nsc_ircc_net_close() local
2254 iobase = self->io.fir_base; in nsc_ircc_net_close()
2259 bank = inb(iobase+BSR); in nsc_ircc_net_close()
2262 switch_bank(iobase, BANK0); in nsc_ircc_net_close()
2263 outb(0, iobase+IER); in nsc_ircc_net_close()
2269 outb(bank, iobase+BSR); in nsc_ircc_net_close()
2327 int iobase = self->io.fir_base; in nsc_ircc_suspend() local
2339 bank = inb(iobase+BSR); in nsc_ircc_suspend()
2342 switch_bank(iobase, BANK0); in nsc_ircc_suspend()
2343 outb(0, iobase+IER); in nsc_ircc_suspend()
2346 outb(bank, iobase+BSR); in nsc_ircc_suspend()