Lines Matching refs:iobase
84 int iobase);
93 static int via_ircc_read_dongle_id(int iobase);
99 static void via_ircc_change_dongle_speed(int iobase, int speed,
101 static int RxTimerHandler(struct via_ircc_cb *self, int iobase);
103 static int via_ircc_dma_xmit(struct via_ircc_cb *self, u16 iobase);
104 static int upload_rxdata(struct via_ircc_cb *self, int iobase);
427 int iobase; in via_remove_one() local
431 iobase = self->io.fir_base; in via_remove_one()
433 ResetChip(iobase, 5); //hardware reset. in via_remove_one()
463 int iobase = self->io.fir_base; in via_hw_init() local
467 SetMaxRxPacketSize(iobase, 0x0fff); //set to max:4095 in via_hw_init()
469 EnRXFIFOReadyInt(iobase, OFF); in via_hw_init()
470 EnRXFIFOHalfLevelInt(iobase, OFF); in via_hw_init()
471 EnTXFIFOHalfLevelInt(iobase, OFF); in via_hw_init()
472 EnTXFIFOUnderrunEOMInt(iobase, ON); in via_hw_init()
473 EnTXFIFOReadyInt(iobase, OFF); in via_hw_init()
474 InvertTX(iobase, OFF); in via_hw_init()
475 InvertRX(iobase, OFF); in via_hw_init()
480 EnRXSpecInt(iobase, ON); in via_hw_init()
484 ResetChip(iobase, 5); in via_hw_init()
485 EnableDMA(iobase, OFF); in via_hw_init()
486 EnableTX(iobase, OFF); in via_hw_init()
487 EnableRX(iobase, OFF); in via_hw_init()
488 EnRXDMA(iobase, OFF); in via_hw_init()
489 EnTXDMA(iobase, OFF); in via_hw_init()
490 RXStart(iobase, OFF); in via_hw_init()
491 TXStart(iobase, OFF); in via_hw_init()
492 InitCard(iobase); in via_hw_init()
493 CommonInit(iobase); in via_hw_init()
494 SIRFilter(iobase, ON); in via_hw_init()
495 SetSIR(iobase, ON); in via_hw_init()
496 CRC16(iobase, ON); in via_hw_init()
497 EnTXCRC(iobase, 0); in via_hw_init()
498 WriteReg(iobase, I_ST_CT_0, 0x00); in via_hw_init()
499 SetBaudRate(iobase, 9600); in via_hw_init()
500 SetPulseWidth(iobase, 12); in via_hw_init()
501 SetSendPreambleCount(iobase, 0); in via_hw_init()
506 via_ircc_change_dongle_speed(iobase, self->io.speed, in via_hw_init()
509 WriteReg(iobase, I_ST_CT_0, 0x80); in via_hw_init()
516 static int via_ircc_read_dongle_id(int iobase) in via_ircc_read_dongle_id() argument
529 static void via_ircc_change_dongle_speed(int iobase, int speed, in via_ircc_change_dongle_speed() argument
538 __func__, speed, iobase, dongle_id); in via_ircc_change_dongle_speed()
546 UseOneRX(iobase, ON); // use one RX pin RX1,RX2 in via_ircc_change_dongle_speed()
547 InvertTX(iobase, OFF); in via_ircc_change_dongle_speed()
548 InvertRX(iobase, OFF); in via_ircc_change_dongle_speed()
550 EnRX2(iobase, ON); //sir to rx2 in via_ircc_change_dongle_speed()
551 EnGPIOtoRX2(iobase, OFF); in via_ircc_change_dongle_speed()
553 if (IsSIROn(iobase)) { //sir in via_ircc_change_dongle_speed()
555 SlowIRRXLowActive(iobase, ON); in via_ircc_change_dongle_speed()
557 SlowIRRXLowActive(iobase, OFF); in via_ircc_change_dongle_speed()
559 if (IsMIROn(iobase)) { //mir in via_ircc_change_dongle_speed()
561 SlowIRRXLowActive(iobase, OFF); in via_ircc_change_dongle_speed()
564 if (IsFIROn(iobase)) { //fir in via_ircc_change_dongle_speed()
566 SlowIRRXLowActive(iobase, OFF); in via_ircc_change_dongle_speed()
574 UseOneRX(iobase, ON); //use ONE RX....RX1 in via_ircc_change_dongle_speed()
575 InvertTX(iobase, OFF); in via_ircc_change_dongle_speed()
576 InvertRX(iobase, OFF); // invert RX pin in via_ircc_change_dongle_speed()
578 EnRX2(iobase, ON); in via_ircc_change_dongle_speed()
579 EnGPIOtoRX2(iobase, OFF); in via_ircc_change_dongle_speed()
580 if (IsSIROn(iobase)) { //sir in via_ircc_change_dongle_speed()
582 SlowIRRXLowActive(iobase, ON); in via_ircc_change_dongle_speed()
585 SlowIRRXLowActive(iobase, OFF); in via_ircc_change_dongle_speed()
587 if (IsMIROn(iobase)) { //mir in via_ircc_change_dongle_speed()
589 SlowIRRXLowActive(iobase, OFF); in via_ircc_change_dongle_speed()
592 SlowIRRXLowActive(iobase, ON); in via_ircc_change_dongle_speed()
594 if (IsFIROn(iobase)) { //fir in via_ircc_change_dongle_speed()
596 SlowIRRXLowActive(iobase, OFF); in via_ircc_change_dongle_speed()
598 WriteTX(iobase, ON); in via_ircc_change_dongle_speed()
601 SlowIRRXLowActive(iobase, ON); in via_ircc_change_dongle_speed()
604 WriteTX(iobase, OFF); in via_ircc_change_dongle_speed()
610 UseOneRX(iobase, OFF); // use two RX pin RX1,RX2 in via_ircc_change_dongle_speed()
611 InvertTX(iobase, OFF); in via_ircc_change_dongle_speed()
612 InvertRX(iobase, OFF); in via_ircc_change_dongle_speed()
613 SlowIRRXLowActive(iobase, OFF); in via_ircc_change_dongle_speed()
614 if (IsSIROn(iobase)) { //sir in via_ircc_change_dongle_speed()
615 EnGPIOtoRX2(iobase, OFF); in via_ircc_change_dongle_speed()
616 WriteGIO(iobase, OFF); in via_ircc_change_dongle_speed()
617 EnRX2(iobase, OFF); //sir to rx2 in via_ircc_change_dongle_speed()
619 EnGPIOtoRX2(iobase, OFF); in via_ircc_change_dongle_speed()
620 WriteGIO(iobase, OFF); in via_ircc_change_dongle_speed()
621 EnRX2(iobase, OFF); //fir to rx in via_ircc_change_dongle_speed()
629 UseOneRX(iobase, ON); //use ONE RX....RX1 in via_ircc_change_dongle_speed()
630 InvertTX(iobase, OFF); in via_ircc_change_dongle_speed()
631 InvertRX(iobase, ON); // invert RX pin in via_ircc_change_dongle_speed()
633 EnRX2(iobase, ON); //sir to rx2 in via_ircc_change_dongle_speed()
634 EnGPIOtoRX2(iobase, OFF); in via_ircc_change_dongle_speed()
636 if( IsSIROn(iobase) ){ //sir in via_ircc_change_dongle_speed()
639 SlowIRRXLowActive(iobase, ON); in via_ircc_change_dongle_speed()
642 SlowIRRXLowActive(iobase, OFF); in via_ircc_change_dongle_speed()
650 if (IsSIROn(iobase)) in via_ircc_change_dongle_speed()
652 else if (IsMIROn(iobase)) in via_ircc_change_dongle_speed()
654 else if (IsFIROn(iobase)) in via_ircc_change_dongle_speed()
656 else if (IsVFIROn(iobase)) in via_ircc_change_dongle_speed()
658 SI_SetMode(iobase, mode); in via_ircc_change_dongle_speed()
676 u16 iobase; in via_ircc_change_speed() local
679 iobase = self->io.fir_base; in via_ircc_change_speed()
684 WriteReg(iobase, I_ST_CT_0, 0x0); in via_ircc_change_speed()
695 SetSIR(iobase, ON); in via_ircc_change_speed()
696 CRC16(iobase, ON); in via_ircc_change_speed()
702 SetSIR(iobase, ON); in via_ircc_change_speed()
703 CRC16(iobase, ON); in via_ircc_change_speed()
707 SetMIR(iobase, ON); in via_ircc_change_speed()
712 SetFIR(iobase, ON); in via_ircc_change_speed()
713 SetPulseWidth(iobase, 0); in via_ircc_change_speed()
714 SetSendPreambleCount(iobase, 14); in via_ircc_change_speed()
715 CRC16(iobase, OFF); in via_ircc_change_speed()
716 EnTXCRC(iobase, ON); in via_ircc_change_speed()
720 SetVFIR(iobase, ON); in via_ircc_change_speed()
729 bTmp = (ReadReg(iobase, I_CF_H_1) & 0x03); in via_ircc_change_speed()
731 WriteReg(iobase, I_CF_H_1, bTmp); in via_ircc_change_speed()
734 via_ircc_change_dongle_speed(iobase, speed, self->io.dongle_id); in via_ircc_change_speed()
737 SetFIFO(iobase, 64); in via_ircc_change_speed()
740 WriteReg(iobase, I_ST_CT_0, 0x80); in via_ircc_change_speed()
747 if (IsSIROn(iobase)) { in via_ircc_change_speed()
748 SIRFilter(iobase, ON); in via_ircc_change_speed()
749 SIRRecvAny(iobase, ON); in via_ircc_change_speed()
751 SIRFilter(iobase, OFF); in via_ircc_change_speed()
752 SIRRecvAny(iobase, OFF); in via_ircc_change_speed()
777 u16 iobase; in via_ircc_hard_xmit_sir() local
782 iobase = self->io.fir_base; in via_ircc_hard_xmit_sir()
797 InitCard(iobase); in via_ircc_hard_xmit_sir()
798 CommonInit(iobase); in via_ircc_hard_xmit_sir()
799 SIRFilter(iobase, ON); in via_ircc_hard_xmit_sir()
800 SetSIR(iobase, ON); in via_ircc_hard_xmit_sir()
801 CRC16(iobase, ON); in via_ircc_hard_xmit_sir()
802 EnTXCRC(iobase, 0); in via_ircc_hard_xmit_sir()
803 WriteReg(iobase, I_ST_CT_0, 0x00); in via_ircc_hard_xmit_sir()
813 SetBaudRate(iobase, self->io.speed); in via_ircc_hard_xmit_sir()
814 SetPulseWidth(iobase, 12); in via_ircc_hard_xmit_sir()
815 SetSendPreambleCount(iobase, 0); in via_ircc_hard_xmit_sir()
816 WriteReg(iobase, I_ST_CT_0, 0x80); in via_ircc_hard_xmit_sir()
818 EnableTX(iobase, ON); in via_ircc_hard_xmit_sir()
819 EnableRX(iobase, OFF); in via_ircc_hard_xmit_sir()
821 ResetChip(iobase, 0); in via_ircc_hard_xmit_sir()
822 ResetChip(iobase, 1); in via_ircc_hard_xmit_sir()
823 ResetChip(iobase, 2); in via_ircc_hard_xmit_sir()
824 ResetChip(iobase, 3); in via_ircc_hard_xmit_sir()
825 ResetChip(iobase, 4); in via_ircc_hard_xmit_sir()
827 EnAllInt(iobase, ON); in via_ircc_hard_xmit_sir()
828 EnTXDMA(iobase, ON); in via_ircc_hard_xmit_sir()
829 EnRXDMA(iobase, OFF); in via_ircc_hard_xmit_sir()
834 SetSendByte(iobase, self->tx_buff.len); in via_ircc_hard_xmit_sir()
835 RXStart(iobase, OFF); in via_ircc_hard_xmit_sir()
836 TXStart(iobase, ON); in via_ircc_hard_xmit_sir()
848 u16 iobase; in via_ircc_hard_xmit_fir() local
853 iobase = self->io.fir_base; in via_ircc_hard_xmit_fir()
883 via_ircc_dma_xmit(self, iobase); in via_ircc_hard_xmit_fir()
893 static int via_ircc_dma_xmit(struct via_ircc_cb *self, u16 iobase) in via_ircc_dma_xmit() argument
895 EnTXDMA(iobase, OFF); in via_ircc_dma_xmit()
897 EnPhys(iobase, ON); in via_ircc_dma_xmit()
898 EnableTX(iobase, ON); in via_ircc_dma_xmit()
899 EnableRX(iobase, OFF); in via_ircc_dma_xmit()
900 ResetChip(iobase, 0); in via_ircc_dma_xmit()
901 ResetChip(iobase, 1); in via_ircc_dma_xmit()
902 ResetChip(iobase, 2); in via_ircc_dma_xmit()
903 ResetChip(iobase, 3); in via_ircc_dma_xmit()
904 ResetChip(iobase, 4); in via_ircc_dma_xmit()
905 EnAllInt(iobase, ON); in via_ircc_dma_xmit()
906 EnTXDMA(iobase, ON); in via_ircc_dma_xmit()
907 EnRXDMA(iobase, OFF); in via_ircc_dma_xmit()
917 SetSendByte(iobase, self->tx_fifo.queue[self->tx_fifo.ptr].len); in via_ircc_dma_xmit()
918 RXStart(iobase, OFF); in via_ircc_dma_xmit()
919 TXStart(iobase, ON); in via_ircc_dma_xmit()
933 int iobase; in via_ircc_dma_xmit_complete() local
939 iobase = self->io.fir_base; in via_ircc_dma_xmit_complete()
944 Tx_status = GetTXStatus(iobase); in via_ircc_dma_xmit_complete()
952 ResetChip(iobase, 3); in via_ircc_dma_xmit_complete()
953 ResetChip(iobase, 4); in via_ircc_dma_xmit_complete()
962 if (IsFIROn(iobase)) { in via_ircc_dma_xmit_complete()
1002 int iobase; in via_ircc_dma_receive() local
1004 iobase = self->io.fir_base; in via_ircc_dma_receive()
1016 EnPhys(iobase, ON); in via_ircc_dma_receive()
1017 EnableTX(iobase, OFF); in via_ircc_dma_receive()
1018 EnableRX(iobase, ON); in via_ircc_dma_receive()
1020 ResetChip(iobase, 0); in via_ircc_dma_receive()
1021 ResetChip(iobase, 1); in via_ircc_dma_receive()
1022 ResetChip(iobase, 2); in via_ircc_dma_receive()
1023 ResetChip(iobase, 3); in via_ircc_dma_receive()
1024 ResetChip(iobase, 4); in via_ircc_dma_receive()
1026 EnAllInt(iobase, ON); in via_ircc_dma_receive()
1027 EnTXDMA(iobase, OFF); in via_ircc_dma_receive()
1028 EnRXDMA(iobase, ON); in via_ircc_dma_receive()
1031 TXStart(iobase, OFF); in via_ircc_dma_receive()
1032 RXStart(iobase, ON); in via_ircc_dma_receive()
1045 int iobase) in via_ircc_dma_receive_complete() argument
1052 iobase = self->io.fir_base; in via_ircc_dma_receive_complete()
1056 len = GetRecvByte(iobase, self); in via_ircc_dma_receive_complete()
1085 len = GetRecvByte(iobase, self); in via_ircc_dma_receive_complete()
1090 __func__, len, RxCurCount(iobase, self), in via_ircc_dma_receive_complete()
1097 st_fifo->len, len - 4, RxCurCount(iobase, self)); in via_ircc_dma_receive_complete()
1117 EnableRX(iobase, OFF); in via_ircc_dma_receive_complete()
1118 EnRXDMA(iobase, OFF); in via_ircc_dma_receive_complete()
1119 RXStart(iobase, OFF); in via_ircc_dma_receive_complete()
1165 static int upload_rxdata(struct via_ircc_cb *self, int iobase) in upload_rxdata() argument
1172 len = GetRecvByte(iobase, self); in upload_rxdata()
1202 RXStart(iobase, ON); in upload_rxdata()
1204 EnableRX(iobase, OFF); in upload_rxdata()
1205 EnRXDMA(iobase, OFF); in upload_rxdata()
1206 RXStart(iobase, OFF); in upload_rxdata()
1215 static int RxTimerHandler(struct via_ircc_cb *self, int iobase) in RxTimerHandler() argument
1224 if (CkRxRecv(iobase, self)) { in RxTimerHandler()
1227 SetTimer(iobase, 20); in RxTimerHandler()
1276 GetHostStatus(iobase), GetRXStatus(iobase)); in RxTimerHandler()
1282 if ((GetRXStatus(iobase) & 0x10) && in RxTimerHandler()
1283 (RxCurCount(iobase, self) != self->RxLastCount)) { in RxTimerHandler()
1284 upload_rxdata(self, iobase); in RxTimerHandler()
1290 SetTimer(iobase, 4); in RxTimerHandler()
1307 int iobase; in via_ircc_interrupt() local
1310 iobase = self->io.fir_base; in via_ircc_interrupt()
1312 iHostIntType = GetHostStatus(iobase); in via_ircc_interrupt()
1323 ClearTimerInt(iobase, 1); in via_ircc_interrupt()
1325 via_ircc_dma_xmit(self, iobase); in via_ircc_interrupt()
1337 RxTimerHandler(self, iobase); in via_ircc_interrupt()
1342 iTxIntType = GetTXStatus(iobase); in via_ircc_interrupt()
1366 iRxIntType = GetRXStatus(iobase); in via_ircc_interrupt()
1381 if (via_ircc_dma_receive_complete(self, iobase)) { in via_ircc_interrupt()
1389 RxCurCount(iobase, self), in via_ircc_interrupt()
1393 ResetChip(iobase, 0); in via_ircc_interrupt()
1394 ResetChip(iobase, 1); in via_ircc_interrupt()
1410 int iobase; in hwreset() local
1411 iobase = self->io.fir_base; in hwreset()
1415 ResetChip(iobase, 5); in hwreset()
1416 EnableDMA(iobase, OFF); in hwreset()
1417 EnableTX(iobase, OFF); in hwreset()
1418 EnableRX(iobase, OFF); in hwreset()
1419 EnRXDMA(iobase, OFF); in hwreset()
1420 EnTXDMA(iobase, OFF); in hwreset()
1421 RXStart(iobase, OFF); in hwreset()
1422 TXStart(iobase, OFF); in hwreset()
1423 InitCard(iobase); in hwreset()
1424 CommonInit(iobase); in hwreset()
1425 SIRFilter(iobase, ON); in hwreset()
1426 SetSIR(iobase, ON); in hwreset()
1427 CRC16(iobase, ON); in hwreset()
1428 EnTXCRC(iobase, 0); in hwreset()
1429 WriteReg(iobase, I_ST_CT_0, 0x00); in hwreset()
1430 SetBaudRate(iobase, 9600); in hwreset()
1431 SetPulseWidth(iobase, 12); in hwreset()
1432 SetSendPreambleCount(iobase, 0); in hwreset()
1433 WriteReg(iobase, I_ST_CT_0, 0x80); in hwreset()
1450 int iobase; in via_ircc_is_receiving() local
1454 iobase = self->io.fir_base; in via_ircc_is_receiving()
1455 if (CkRxRecv(iobase, self)) in via_ircc_is_receiving()
1473 int iobase; in via_ircc_net_open() local
1482 iobase = self->io.fir_base; in via_ircc_net_open()
1510 EnAllInt(iobase, ON); in via_ircc_net_open()
1511 EnInternalLoop(iobase, OFF); in via_ircc_net_open()
1512 EnExternalLoop(iobase, OFF); in via_ircc_net_open()
1524 sprintf(hwname, "VIA @ 0x%x", iobase); in via_ircc_net_open()
1541 int iobase; in via_ircc_net_close() local
1555 iobase = self->io.fir_base; in via_ircc_net_close()
1556 EnTXDMA(iobase, OFF); in via_ircc_net_close()
1557 EnRXDMA(iobase, OFF); in via_ircc_net_close()
1561 EnAllInt(iobase, OFF); in via_ircc_net_close()